CP3BT26 Datasheet, PDF (21/278 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

Mnemonic
ASHUD
LSHi
LSHD
SBITi
CBITi
TBIT
TBITi
LPR
LPRD
SPR
SPRD
Bcond
BAL
BR
EXCP
Jcond
JAL
JUMP
JUSR
Table 5 Instruction Set Summary
Operands
Rsrc/imm, RPdest
Rsrc/imm, Rdest
Rsrc/imm, RPdest
Iposition, disp(Rbase)
Iposition, disp(RPbase)
Iposition, (Rindex)disp(RPbasex)
Iposition, abs
Iposition, (Rindex)abs
Iposition, disp(Rbase)
Iposition, disp(RPbase)
Iposition, (Rindex)disp(RPbasex)
Iposition, abs
Iposition, (Rindex)abs
Rposition/imm, Rsrc
Iposition, disp(Rbase)
Iposition, disp(RPbase)
Iposition, (Rindex)disp(RPbasex)
Iposition, abs
Iposition, (Rindex)abs
Rsrc, Rproc
RPsrc, Rprocd
Rproc, Rdest
Rprocd, RPdest
disp9
disp17
disp24
RPlink, disp24
disp9
disp17
disp24
vector
RPtarget
RA, RPtarget,
RPlink, RPtarget
RPtarget
RPtarget
Description
Arithmetic left/right shift
Logical left/right shift
Logical left/right shift
Set a bit in memory
(Because this instruction treats the destination as a read-
modify-write operand, it not be used to set bits in write-
only registers.)
Clear a bit in memory
Test a bit in a register
Test a bit in memory
Load processor register
Load double processor register
Store processor register
Store 32-bit processor register
Conditional branch
Branch and link
Branch
Trap (vector)
Conditional Jump to a large address
Jump and link to a large address
Jump
Jump and set PSR.U
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