CP3BT26 Datasheet, PDF (23/278 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

Mnemonic
STORMP
imm3
DI
EI
EIWAIT
NOP
WAIT
Table 5 Instruction Set Summary
Operands
Description
Store 1 to 8 registers (R2-R5, R8-R11) to memory starting
at (R7,R6)
Disable maskable interrupts
Enable maskable interrupts
Enable maskable interrupts and wait for interrupt
No operation
Wait for interrupt
23
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