CP3BT26 Datasheet, PDF (164/278 Pages) National Semiconductor (TI) – Reprogrammable Connectivity Processor with Bluetooth-R, USB, and CAN Interfaces

Data bits are sensed by taking a majority vote of three sam-
ples latched near the midpoint of each baud (bit time). Nor-
mally, the position of the samples within the baud is
determined automatically, but software can override the au-
tomatic selection by setting the USMD bit in the UnMDSL2
register and programming the UnSPOS register.
of the RSFT register are copied into the UnRBUF register
and the Receive Buffer Full bit (URBF) is set. The URBF bit
is automatically cleared when software reads the character
from the URBUF register. The RSFT register is not software
accessible.
Serial data input on the RXD pin is shifted into the RSFT
register. On receiving the complete character, the contents
Control and
Error Detection
Parity
Generator/Checker
Transmitter
Baud Clock
System Clock
Flow Control
Logic
Baud Rate
Generator
Baud Clock
Receiver
Figure 76. UART Block Diagram
TXD
RTS
CTS
CKX
RXD
DS060
16 1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 1
Sample
STARTBIT
Sample
DATA (LSB)
16 1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 1
DATABIT
Sample
Figure 77. UART Asynchronous Communication
DS061
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