MC68HC05F8 Datasheet, PDF (83/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
9.3
DMG Registers
The DMG has three registers, Row Frequency Control register and Column Frequency Control
register, for row and column frequencies selection respectively; and Tone Control register for tone
output control and mode selection.
9.3.1
Row Frequency Control Register (FCR)
Column Frequency Control Register (FCC)
Row Frequency Control
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$13
FCR4 FCR3 FCR2 FCR1 FCR0 000u uuuu
Column Frequency Control
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$14
FCC4 FCC3 FCC2 FCC1 FCC0 000u uuuu
FCR0-4 and FCC0-4 control the frequencies of the tone signals on the row and the column paths
respectively. The bit description for DTMF and Melody tone generation are shown in Table 9-1 and
Table 9-2 respectively.
Table 9-1 Bit Description for DTMF Generation
Standard
Tone Output Frequency
9
FCR
FCC
TONE
Frequency
Frequency
Deviation
(Hz)
(Hz)
(%)
$00
f_R1
$01
See Note
f_R2
$02
f_R3
$03
f_R4
$10
f_C1
$11
See note
f_C2
$12
f_C3
$13
f_C4
697
694.8
0.32
770
770.1
–0.02
852
854.2
–0.03
941
940.0
0.11
1209
1206.0
0.244
1336
1331.7
0.324
1477
1486.5
–0.645
1633
1639.0
–0.367
Note:
The legal values in the FCR are illegal to the FCC, and vice versa. An illegal value to
these registers will produce a tri-state at the TONEOUT output pin, and a logic high at
the TONEX output pin.
MC68HC05F8
DTMF/MELODY GENERATOR
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TPG
MOTOROLA
9-3