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MC68HC05F8 Datasheet, PDF (79/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit | |||
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Freescale Semiconductor, Inc.
NCC - Encoding Completion Flag
This bit is set to indicate that no data transmitting or encoding is in progress. It is set when one of
the following cases occurs:
1) The encoder is disabled, i.e. NCE=0, transmission of the data in the encode
data shift register is completed.
2) The encoder is enabled, NCE=1, the encode data register is empty
(NCM=1) and transmission of the data in the encode data shift register is
completed.
Writing to the Encoder Data register when the NCE bit is set clears this ï¬ag. Reset or clearing the
NCE bit sets this NCC bit.
DCF - Decoder Data Register Full Flag
This bit is set when one byte of data is received with end pattern veriï¬ed, and an interrupt is
generated if the decoder interrupt is enabled (DIE=1). This ï¬ag is cleared when the Status register
is accessed (with DCF set) followed by a read of the Decode Data register, or by clearing the DCE
bit.
OVF - Overrun Flag
When an overrun occurs, this ï¬ag is set, and an interrupt is generated if the decode interrupt is
enabled. Clearing the DCE bit will reset the decoder and thus clearing this ï¬ag. See
Section 8.2.2.1 for deï¬nition of an overrun condition.
8
8.3.3 Encode Data Register ($2D)
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
$2D
This is a write only register. Data written to this register will be encoded to Manchester format and
then transmitted out to the ENCOOUT pin in sequential format.
8.3.4 Decode Data Register ($2E)
Address bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
$2E
The is a read only register. Data in Manchester format entering the DECOIN pin will be decoded
and the result placed in this register.
MC68HC05F8
MANCHESTER ENCODER/DECODER
For More Information On This Product,
Go to: www.freescale.com
TPG
MOTOROLA
8-9
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