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MC68HC05F8 Datasheet, PDF (62/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit | |||
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Freescale Semiconductor, Inc.
6.3.2 COP System Enable and Operation
A watchdog timer enable (WDTE) bit in the WDCSR is used to enable the COP watchdog system.
Its default value is â0â at reset (watchdog disabled).
Writing a â1â to this bit will load the watchdog timer counter with the initial value selected by
WDT0 & WDT1 bits and activate the watchdog timer clock. When the watchdog timer counter
reaches zero, a watchdog time-out signal is generated to reset the MCU with WDTOF set.
Once the watchdog is enabled, it cannot be disabled by software; writing a â0â to the WDTE bit has
no effect.
6.3.3 Disable COP Function in Stop or Wait Mode
6
A kill watchdog timer (KWDT) bit is provided in the WDCSR to optionally disable and reset the
watchdog timer when the STOP or WAIT instruction is executed. This allows the CPU to go into
an extended sleep or Wait mode without watchdog timer resets. This feature is not enabled if the
KWDT bit is set to â0â.
The KWDT bit permits a âSTOPâ or âWAITâ instruction to disable the Watchdog Timer. To do so,
KWDT must be written to a logic â1â on the ï¬rst write to the WDCSR after a reset. However, this
ï¬rst write only enables the âkillâ feature. A second write of a logic â0â to KWDT must be performed
to engage the âkillâ feature. After the second write, the execution of a STOP or WAIT instruction
will reset the Watchdog Timer and disable the COP watchdog system. Two speciï¬c writes are
required for this feature to prevent accidental engagement by a single spurious write.
The watchdog counter resumes counting when the MCU exits Stop or Wait mode.
6.3.4 Watchdog Timer Control Status Register (WDCSR)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$36 WDTE KWDT WDTOF
WDT1 WDT0 000- --00
WDTE - Watchdog Timer Enable/Disable
1 (set) â Watchdog timer enabled.
0 (clear) â Watchdog timer disabled.
The default for the watchdog timer at reset is disabled. Once enabled by writing a logic â1â to this
bit, it cannot be disabled by software. Writing a logic â0â have no effect to this bit.
MOTOROLA
6-14
TIMERS
For More Information On This Product,
Go to: www.freescale.com
TPG
MC68HC05F8
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