MC68HC05F8 Datasheet, PDF (43/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
INT2E
1 (set) – External interrupt IRQ2 enabled.
0 (clear) – External interrupt IRQ2 disabled.
5.3.3 External Interrupt Flags (INTF1 & INTF2)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Miscellaneous Register
$17 POR INTF1 INTF2 KEYF
r000 ----
r=1 for POR; r=0 for RESET
5
INTF1
1 (set) – An interrupt on IRQ1 pin has occurred.
0 (clear) – An interrupt on IRQ1 pin has not occurred.
After servicing this interrupt, this flag should be cleared by writing a “0” to this bit.
INTF2
1 (set) – An interrupt on IRQ2 pin has occurred.
0 (clear) – An interrupt on IRQ2 pin has not occurred.
After servicing this interrupt, this flag should be cleared by writing a “0” to this bit.
5.4
Keyboard Interrupt
Port pins PA0-PA7 can be configured as keyboard interrupt lines with internal pull-up when the
control bits KEYE, KEYX4, KEYX5, KEYX6, and KEYX7 are set. A falling edge of negative pulse
with minimum width of T_ILIH (250ns) on any configured port A pins will cause a keyboard interrupt
to occur. A keyboard interrupt is recognized by the interrupt flag KEYF in the Miscellaneous
register (bit 4 of address $17). This flag is cleared by writing a logic “0” to this bit.
When the interrupt is recognized, the current state of the machine is pushed onto the stack and
the interrupt mask bit in the condition code register is set. This masks any further interrupt until
the present one is serviced. The keyboard interrupt causes the program counter to vector to
memory location $FFF0 and $FFF1 which contains the starting address of the interrupt’s service
routine.
When configured, the keyboard interrupt lines remain active in during Stop mode. This allows a
keyboard interrupt to wake up the MCU when in Stop mode. See Figure 5-4 for keyboard interrupt
circuit.
MC68HC05F8
INTERRUPTS
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