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MC68HC05F8 Datasheet, PDF (33/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit
Freescale Semiconductor, Inc.
4
RESETS
4
The MC68HC05F8 can be reset in four ways: by the initial power-on reset function, by an active
low input to the RESET pin, by an opcode fetch from an illegal address, and by a COP watchdog
reset (if the watchdog timer is enabled). Any of these resets will cause the program to go to its
starting address, specified by the contents of memory locations $FFFE and $FFFF, and cause the
interrupt mask of the Condition Code register to be set.
4.1
Power-On Reset (POR)
The power-on reset occurs when a positive transition is detected on the supply voltage, VDD. The
power-on reset is used strictly for power-up conditions, and should not be used to detect any drops
in the power supply voltage. There is no provision for a power-down reset. The power-on circuitry
provides for a 4064 tcyc delay from the time that the oscillator becomes active. If the external
RESET pin is low at the end of the 4064 tcyc time out, the processor remains in the reset condition
until RESET goes high. The user must ensure that VDD has risen to a point where the MCU can
operate properly prior to the time the 4064 POR cycles have elapsed. If there is doubt, the external
RESET pin should remain low until such time that VDD has risen to the minimum operating voltage
specified.
After a power-on reset the POR bit in the Miscellaneous register (bit 7 of address $17) is set,
indicating the reset was cause by a power-on, not COP watchdog time-out or external reset. The
POR bit is cleared by writing a logic “0” to the bit. The POR cannot be set by software.
4.2
RESET Pin
The RESET input pin is used to reset the MCU to provide an orderly software start-up procedure.
When using the external reset, the RESET pin must stay low for a minimum of 1.5tcyc. The
RESET pin contains an internal Schmitt Trigger as part of its input to improve noise immunity.
MC68HC05F8
RESETS
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4-1