MC68HC05F8 Datasheet, PDF (75/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
t≤1 bit time
NCE (encode enable)
2 bits
DELAY
2 bits SYNC
High Z
A sequence of one byte data
8 bits data
2 bits
PAUSE
High Z
1st 2nd ^{D0 D1 D2 D3 D4 D5 D6 D7} Trailing
ENCOOUT ^{SYN bit SYN bit 0}
0
1
1
1
0
1
0 _bit
ENCODER OUT
1
2
3
4
5
6
7
8
Figure 8-3 Encoder Timing Diagram
8.2.2 Decoder
The Manchester decoder is used to convert incoming Manchester codes on the DECOIN pin to
8
NRZ data format for processing.
Upon reset the decoder is disabled, decoder enable bit DCE=0. To initiate the decoding process,
the bit rate is first configured. Setting DCE activates the internal decoding clock, the decoder
enters the start state and the DECOIN pin begins to be sampled. After a low state is confirmed,
the receiver starts to hunt for the 2 bits SYNC pattern. if it is detected, the decoding procedure
starts, the decode logic converts the data bits from Manchester code format to NRZ format and
shifts the result to the decode shift register bit by bit. After all 8 bits have been received and
converted to one data byte, the end pattern of a trailing bit plus two bit pause is verified. If the
pattern followed is correct, the decode flag is set and an interrupt is generated, otherwise the
decoder is reset and returns to the start state.
8.2.2.1 Decoder Overrun
After one byte of data is received and end pattern verified, the decode output flag (DCF) is
checked first, if it is zero (indicating the Decode Register is empty), one byte of data which has
been received is loaded to the Decode Register and interrupt is generated with the decode output
flag set (DCF=1), otherwise the receive overrun flag is set and an interrupt is generated.
MC68HC05F8
MANCHESTER ENCODER/DECODER
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8-5