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MC68HC05F8 Datasheet, PDF (55/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit | |||
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Freescale Semiconductor, Inc.
ICF - Input Capture Flag
1 (set) â A valid input capture has occurred.
0 (clear) â No input capture has occurred.
This bit is set when the selected polarity of edge is detected by the input capture edge detector;
an input capture interrupt will be generated, if ICIE is set, ICF is cleared by reading the TSR and
then the Input Capture Low register ($1B)
OCF - Output Compare Flag
1 (set) â A valid output compare has occurred on output compare register.
0 (clear) â No output compare has occurred on output compare register.
OCF will be set when its output compare register contents match that of the free-running counter;
an output compare interrupt will be generated, if OCIE is set. OCF is cleared by reading the TSR
and then the Output Compare Low register ($1D).
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TOF - Timer Overï¬ow Flag
1 (set) â Timer Overï¬ow has occurred.
0 (clear) â No timer overï¬ow has occurred.
This bit is set when the free-running counter overï¬ows from $FFFF to $0000; a timer overï¬ow
interrupt will occur, if TOIE (bit 5 in Timer Control register $18) is set. TOF is cleared by reading
the TSR and the Counter Low register ($1F).
When using the timer overï¬ow function and reading the free-running counter at random times to
measure an elapsed time, a problem may occur whereby the timer overï¬ow ï¬ag is unintentionally
cleared if:
1) the timer status register is read or written when the TOF is set, and
2) the LSB of the free-running counter is read, but not for the purpose of
servicing the ï¬ag.
Reading the alternate counter register instead of the counter register will avoid this potential
problem.
6.1.6 Programmable Timer Timing Diagrams
The relationships between the internal clock signals, the counter contents and the status of the
ï¬ag bits are shown in the following diagrams. It should be noted that the signals labelled âinternalâ
(processor clock, timer clocks and Reset) are not available to the user.
The timing diagrams are for a timer clock frequency of internal bus clock÷4;
TCSA0 = TCSA1 = 0.
MC68HC05F8
TIMERS
For More Information On This Product,
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TPG
MOTOROLA
6-7
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