MC68HC05F8 Datasheet, PDF (61/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
6.3
COP WATCHDOG
A COP (Computer Operating Properly) Watchdog Timer is implemented to restore system
operation in the event of system lock-up. This timer consists of a counter which is clocked by a
4Hz signal; the time-out period is software programmable to approximately 0.5, 1, 2 or 4 seconds
(default time out period is 0.5s after a reset). A watchdog reset occurs when the Watchdog Timer
times out, unless the timer is periodically reset by writing to the Watchdog Timer Control Status
register.
WDTOF
4Hz CLOCK
WAKE-UP
ACTIVE
LOGIC
MC68HC05F8 INTERNAL BUS
RESET
&
WATCHDOG
&
TIMER COUNTER
STOPM
&
TIME-OUT DETECTOR
+
WAITM
6
TIME-OUT
VALUE
WDTE
KWDT WDTOF
WATCHDOG CONTROL REGISTER
WDT1 WDT0
Figure 6-7 Watchdog Timer Block Diagram
6.3.1 Watchdog Timer Time-Out Flag
A watchdog time-out flag (WDTOF) is provided in the Watchdog Control Status register (WDCSR,
$36), to allow the user to distinguish between a normal reset (power-on-reset or external reset)
and a Watchdog Timer reset. This bit is a logic “1” if the reset was due to a watchdog time-out and
logic “0” for a normal reset; and is cleared by reading the WDCSR register. Writing a logic “1” to
this bit has no effect on its value other than resetting the watchdog timer counter.
MC68HC05F8
TIMERS
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MOTOROLA
6-13