MC68HC05F8 Datasheet, PDF (68/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
SCK
SDO
SDI
E/4
CLOCK
MASTER
START LOGIC
SLAVE
START LOGIC
READ
8
READ BUFFER
(LOAD)
8
SPIF
8-BIT SHIFT
REGISTER
(FULL)
8
WRITE
SPCR
CONTROL BITS
7
STATE
CONTROLLER
SPSR
2
FLAGS
3
Note:
SCK, MOSI, and MISO are external pins; where
SCK - provides system clock when device is configured as a master unit. Receives system clock
when device is configured as a slave unit.
SDI - provides serial output to slave unit when device is configured as a master. Receives serial
input from master when device is configured as a slave unit.
SDO - receives serial input from slave unit when device is configured as a master. Provides serial
output to master when device is configured as a slave unit.
Figure 7-3 SPI Block Diagram
7.4.1 SPI Control Register (SPCR)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$10 SPIE SPE
MSTR
00-0 ----
SPIE - Serial Peripheral Interrupt Enable
When the serial peripheral interrupt enable bit is high, it allows the occurrence of a processor
interrupt and forces the proper vector to be loaded into the program counter if the serial peripheral
MOTOROLA
7-4
SERIAL PERIPHERAL INTERFACE
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TPG
MC68HC05F8