MC68HC05F8 Datasheet, PDF (44/126 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor(HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
5.4.1 Keyboard Control Register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$34 KEYE
KEYX7 KEYX6 KEYX5 KEYX4 0--- 000
KEYE
1 (set) – PA0-PA3 are configured as keyboard interrupt lines with internal
pull-up.
0 (clear) – PA0-PA3 are configured as standard I/O lines.
5
KEYX7, KEYX6, KEYX5, KEYX4
These four bits configure their corresponding port A lines.
1 (set) – PAx is configured as a keyboard line with internal pull-up.
0 (clear) – PAx is configured as a standard I/O line.
5.5
Programmable Timer (Timer A) Interrupt
Three timer interrupt flags are found in the three most significant bits of the Timer Status register
(TSR) at location $19. All three interrupts will vector to the same address at location
$FFF6-$FFF7.
Timer Status Register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$19 ICF OCF TOF
uuu- ----
Each flag bit is defined as follows:
TOF - Timer Overflow Flag
TOF is set during the counter transition of $FFFF to $0000. It is cleared by
reading the TSR (with TOF set) followed by reading the counter least significant
byte ($1F).
OCF - Output Compare Flag
OCF is set when the Output Compare register matches the Counter register. It
is cleared by reading the TSR (with OCF set) and then accessing the Output
Compare register least significant byte ($1D).
MOTOROLA
5-8
INTERRUPTS
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TPG
MC68HC05F8