MC68HC711K4CFN4 Datasheet, PDF (76/80 Pages) Motorola, Inc – 8-Bit Microcontroller

PWCLK —Pulse-Width Modulation Clock Select
$0060
Bit 7
6
5
4
3
2
1
Bit 0
CON34 CON12 PCKA2 PCKA1
—
PCKB3 PCKB2 PCKB1
RESET:
0
0
0
0
0
0
0
0
CON34 —Concatenate Channels 3 and 4
Channel 3 is high-order byte, and channel 4 is the low-order byte. The resulting output is available on
port H, pin 3. Clock source is determined by PCLK4.
0 = Channels 3 and 4 are separate 8-bit PWMs.
1 = Channels 3 and 4 are concatenated to create one 16-bit PWM channel.
CON12 —Concatenate Channels One and Two
Channel 1 is high-order byte, and channel 2 is the low-order byte. The resulting output is available on
port H, pin 1. Clock source is determined by PCLK2.
0 = Channels 1 and 2 are separate 8-bit PWMs.
1 = Channels 1 and 2 are concatenated to create one 16-bit PWM channel.
PCKA[2:1] —Prescaler for Clock A (See also PWSCAL register)
Determines the rate of clock A
PCKA[2:1]
00
01
10
11
Bit 3 —Not implemented
Always reads zero
PCKB[3:1] —Prescaler for Clock B
Determines the rate for clock B
Value of Clock A
E
E/2
E/4
E/8
PCKB[3:1]
000
001
010
011
100
101
110
111
Value of Clock B
E
E/2
E/4
E/8
E/16
E/32
E/64
E/128
PWPOL —Pulse-Width Modulation Timer Polarity
RESET:
Bit 7
PCLK4
0
6
PCLK3
0
5
PCLK2
0
4
PCLK1
0
PCLK4 —Pulse-Width Channel 4 Clock Select
0 = Clock B is source
1 = Clock S is source
3
PPOL4
0
2
PPOL3
0
1
PPOL2
0
$0061
Bit 0
PPOL1
0
MOTOROLA
76
M68HC11 K Series
MC68HC11TS/D