MC68HC711K4CFN4 Datasheet, PDF (14/80 Pages) Motorola, Inc – 8-Bit Microcontroller

3 On-Chip Memory
In general, K-series MCUs have 768 bytes RAM, 640 bytes EEPROM, and 24 Kbytes ROM/EPROM.
Some devices in the series have portions of their memory resources disabled. Some have ROM and
some have EPROM replacing ROM. The following paragraphs describe the memory systems of devices
in the series.
3.1 Memory Map and Register Block
The INIT, INIT2, and CONFIG registers control the presence and location of the registers, RAM, EE-
PROM, and ROM/EPROM in the 64 Kbyte CPU address space. The 128-byte register block originates
at $0000 after reset and can be placed at any 4 Kbyte boundary ($x000) after reset by writing an ap-
propriate value to the INIT register. Refer to Figure 4.
$0000
EXT
$1000
x000
128-BYTE REGISTER BLOCK
(CAN BE REMAPPED TO ANY
x07F _{4K PAGE BY THE INIT REGISTER)}
EXT
x080 _{768 BYTES RAM}
(CAN BE REMAPPED TO ANY
x37F ^{4K PAGE BY THE INIT REGISTER)}
EXT
EXT
$A000
$FFFF
SINGLE
CHIP
EXPANDED BOOTSTRAP
SPECIAL
TEST
xD00
xD7F
xD80
xFFF
A000
FFFF
RESERVED (SPECIAL TEST MODE ONLY)
640 BYTES EEPROM
(CAN BE REMAPPED TO ANY
4K PAGE BY THE INIT2 REGISTER)
BE00
BOOT ROM
(ONLY PRESENT IN
BOOTSTRAP MODE)
BFC0 SPECIAL MODE
INTERRUPT
BFFF _VECTORS
24 KBYTES ROM/EPROM
(CAN BE REMAPPED TO $2000–$7FFF OR
$A000–$FFFF BY THE CONFIG REGISTER)
FFC0 NORMAL MODE
INTERRUPT
FFFF VECTORS
NOTE: ROM/EPROM can be enabled in special test mode by setting ROMON bit in the config register after reset.
Figure 4 Memory Map
MOTOROLA
14
M68HC11 K Series
MC6HC11KTS/D