MC68HC711K4CFN4 Datasheet, PDF (61/80 Pages) Motorola, Inc – 8-Bit Microcontroller

A multiplexer allows the single A/D converter to select one of 16 analog input signals.
The A/D converter control logic implements automatic conversion sequences on a selected channel
four times or on four channels once each. A write to the ADCTL register initiates conversions and, if
made while a conversion is in progress, a write to ADCTL also halts that conversion operation, sets
CCF, and proceeds to the next instruction.
When the SCAN bit is zero, four requested conversions are performed, once each, to fill the four result
registers. When SCAN is one, conversions continue in a round-robin fashion with the result registers
being updated as new data becomes available. When the MULT bit is zero, the A/D converter system
is configured to perform conversions on each channel in the group of four channels specified by the CD
and CC channel select bits.
E CLOCK
WRITE
TO
ADCTL
12 E CYCLES
SAMPLE ANALOG INPUT
MSB
4
CYCLES
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 LSB
22222222
CYC CYC CYC CYC CYC CYC CYC CYC
SUCCESSIVE APPROXIMATION SEQUENCE
END
REPEAT
SEQUENCE
IF
SCAN = 1
SET
CCF
FLAG
CONVERT FIRST
CONVERT SECOND
CONVERT THIRD
CONVERT FOURTH
CHANNEL
CHANNEL
CHANNEL
CHANNEL
AND UPDATE ADDR1
AND UPDATE ADDR2
AND UPDATE ADDR3
AND UPDATE ADDR4
0
32
64
96
128 E
CYCLES
Figure 15 Timing Diagram for a Sequence of Four A/D Conversions
ANALOG
INPUT
PIN
INPUT
PROTECTION
DEVICE
< 2 pF
+ _~ 20 V
– _~ 0.7 V
DIFFUSION AND
POLY COUPLER
≤ 4 kΩ
400 nA
JUNCTION
LEAKAGE
*
~ ^{20 pF}
DAC
CAPACITANCE
VRL
* This analog switch is closed only during the 12-cycle sample time.
Figure 16 Electrical Model of an Analog Input Pin (Sample Mode)
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
61