MC68HC711K4CFN4 Datasheet, PDF (47/80 Pages) Motorola, Inc – 8-Bit Microcontroller

NOTE
In expanded and special test modes, chip-select circuitry forces the I/O state to be
an output for each port H pin associated with an enabled chip select. In any mode,
PWM circuitry forces the I/O state to be an output for each port H line associated
with an enabled pulse width modulator channel. In these cases, data direction bits
are not changed and have no effect on these lines. DDRH reverts to controlling the
I/O state of a pin when the associated function is disabled. Refer to 4.3 Memory
Expansion and Chip Selects and 12 Pulse-Width Modulation Timer for further
information.
PORTG —Port G Data
$007E
Bit 7
6
5
4
3
2
1
Bit 0
PG7
PG6
PG5
PG4
PG3
PG2
PG1
PG0
RESET:
I
I
I
I
I
I
I
I
Alt. Pin
Func.:
R/W
—
XA18
XA17
XA16
XA15
XA14
XA13
Port G pins reset to high-impedance inputs with selectable internal pull-up resistors. In expanded and
special test modes PG7 becomes R/W. Refer to PGAR register description.
DDRG —Data Direction Register for Port G
$007F
RESET:
Bit 7
DDG7
0
6
DDG6
0
5
DDG5
0
4
DDG4
0
3
DDG3
0
2
DDG2
0
1
DDG1
0
Bit 0
DDG0
0
DDG[7:0] —Data Direction for Port G
0 = Configure corresponding I/O pin for input only
1 = Configure corresponding I/O pin for output
In expanded and test modes, bit 7 is configured for R/W, forcing the state of this pin to be an output
although the DDRG value remains zero. Refer to PGAR register description.
PGAR — Port G Assignment
$002D
$002D
RESET:
Bit 7
—
0
6
5
4
3
2
1
Bit 0
—
PGAR5 PGAR4 PGAR3 PGAR2 PGAR1 PGAR0
0
0
0
0
0
0
0
Bits [7:6] —Not implemented
Always read zero
PGAR[5:0] —Port G Pin Assignment Bits [5:0]
0 = Corresponding port G pin is general-purpose I/O
1 = Corresponding port G pin is memory expansion address line (XA[18:13])
NOTE
Each PGAR bit forces the I/O state to be an output for each port G pin associated
with an enabled expansion address line. In this case, data direction bits are not
changed and have no effect on these lines. DDRG reverts to controlling the I/O
state of a pin when the associated function is disabled. Refer to 4.1 Memory Ex-
pansion for further information.
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
47