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MC68HC711K4CFN4 Datasheet, PDF (51/80 Pages) Motorola, Inc – 8-Bit Microcontroller
RECEIVER
BAUD RATE
CLOCK
PD0/
RxD
DDD0
÷16
PIN BUFFER
AND CONTROL
DATA
RECOVERY
DISABLE
DRIVER
RE
SCSR2 SCI STATUS 2
M
WAKE-UP
LOGIC
PARITY
DETECT
10 (11) - BIT
Rx SHIFT REGISTER
(8) 7 6 5 4 3 2 1 0
MSB
ALL ONES
RWU
SCCR1 SCI CONTROL 1
SCSR1 SCI STATUS 1
RDRF
RIE
IDLE
ILIE
OR
RIE
R8 T8 – – – – – –
SCDRH Tx/Rx DATA HIGH $x076
7 6 5 4 3 2 1 0 $x077
SCDRL Tx/Rx DATA LOW
(READ-ONLY)
SCCR2 SCI CONTROL 2
SCI Tx
REQUESTS
SCI INTERRUPT
REQUEST
Figure 11 SCI Receiver Block Diagram
INTERNAL
DATA BUS
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
51