MC68HC711K4CFN4 Datasheet, PDF (45/80 Pages) Motorola, Inc – 8-Bit Microcontroller

SPCR —Serial Peripheral Control
RESET:
Bit 7
SPIE
0
0
6
SPE
0
0
5
DWOM
1
0
4
MSTR
0
0
3
CPOL
0
0
2
CPHA
0
0
1
SPR1
0
0
$0028
Bit 0
SPR0
0
0
Boot Mode
Other Modes
SPIE —SPI Interrupt Enable
Refer to 8 Serial Peripheral Interface.
SPE —SPI System Enable
Refer to 8 Serial Peripheral Interface.
DWOM —Port D Wired-OR Mode Option for SPI Pins PD[5:2] (See also WOMS bit in SCCR1)
0 = PD[5:2] are normal CMOS outputs
1 = PD[5:2] are open-drain outputs
MSTR —Master/Slave Mode Select
Refer to 8 Serial Peripheral Interface.
CPOL —Clock Polarity
Refer to 8 Serial Peripheral Interface.
CPHA —Clock Phase
Refer to 8 Serial Peripheral Interface.
SPR[1:0] —SPI Clock Rate Selects
Refer to 8 Serial Peripheral Interface.
SCCR1 —SCI Control 1
Bit 7
6
5
LOOPS WOMS —
RESET: 0
1
0
0
0
0
4
3
2
M WAKE ILT
0
0
0
0
0
0
$0072
1
Bit 0
PE
PT
0
0
Boot Mode
0
0 Other Modes
LOOPS —SCI LOOP Mode Enable
Refer to 7 Serial Communications Interface.
WOMS —Port D Wired-OR Mode Option for SPI Pins PD[5:2] (See also DWOM bit in SPCR.)
0 = TxD and RxD operate normally
1 = TxD and RxD are open drains if operating as an output
Bit 5 —Not implemented
Always reads zero
M —Mode (Select Character Format)
Refer to 7 Serial Communications Interface.
WAKE —Wakeup by Address Mark/Idle
Refer to 7 Serial Communications Interface.
ILT —Idle Line Type
Refer to 7 Serial Communications Interface.
PE —Parity Enable
Refer to 7 Serial Communications Interface.
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
45