MC68HC711K4CFN4 Datasheet, PDF (67/80 Pages) Motorola, Inc – 8-Bit Microcontroller

TOC1–TOC4 —Timer Output Compare
$0016 Bit 15 14
13
12
11
10
$0017 Bit 7
6
5
4
3
2
$0018 Bit 15 14
13
12
11
10
$0019 Bit 7
6
5
4
3
2
$001A Bit 15 14
13
12
11
10
$001B Bit 7
6
5
4
3
2
$001C Bit 15 14
13
12
11
10
$001D Bit 7
6
5
4
3
2
All TOCx register pairs reset to ones ($FFFF).
$0016–$001D
9
Bit 8 High TOC1
1
Bit 0 Low
9
Bit 8 High TOC2
1
Bit 0 Low
9
Bit 8 High TOC3
1
Bit 0 Low
9
Bit 8 High TOC4
1
Bit 0 Low
TI4/O5 —Timer Input Capture 4/Output Compare 5
$001E–$001F
$001E Bit 15
14
13
12
11
10
9
Bit 8
High
$001F Bit 7
6
5
4
3
2
1
Bit 0
Low
This is a shared register and is either input capture 4 or output compare 5 depending on the state of bit
I4/O5 in PACTL. Writes to TI4/O5 have no effect when this register is configured as input capture 4. The
TI4/O5 register pair resets to ones ($FFFF).
TCTL1 —Timer Control 1
$0020
Bit 7
6
5
4
3
2
1
Bit 0
OM2
OL2
OM3
OL3
OM4
OL4
OM5
OL5
RESET:
0
0
0
0
0
0
0
0
OM[5:2] —Output Mode
OL[5:2] —Output Level
OMx
OLx
0
0
0
1
1
0
1
1
Action Taken on Successful Compare
Timer disconnected from output pin logic
Toggle OCx output line
Clear OCx output line to zero
Set OCx output line to one
TCTL2 —Timer Control 2
RESET:
Bit 7
EDG4B
0
6
EDG4A
0
5
EDG1B
0
4
EDG1A
0
3
EDG2B
0
2
EDG2A
0
1
EDG3B
0
$0021
Bit 0
EDG3A
0
Table 11 Timer Control Configuration
EDGxB
0
0
1
1
EDGxA
0
1
0
1
Configuration
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
67