MC68HC711K4CFN4 Datasheet, PDF (53/80 Pages) Motorola, Inc – 8-Bit Microcontroller

LOOPS —SCI LOOP Mode Enable
0 = SCI transmit and receive operate normally
1 = SCI transmit and receive are disconnected from TxD and RxD pins, and transmitter output is
fed back into the receiver input
WOMS —Wired-OR Mode Option for PD[1:0] (See also DWOM bit in SPCR.)
0 = TxD and RxD operate normally
1 = TxD and RxD are open drains if operating as an output
Bit 5 —Not implemented
Always reads zero
M —Mode (Select Character Format)
0 = Start bit, 8 data bits, 1 stop bit
1 = Start bit, 9 data bits, 1 stop bit
WAKE —Wakeup by Address Mark/Idle
0 = Wakeup by IDLE line recognition
1 = Wakeup by address mark (most significant data bit set)
ILT —Idle Line Type
0 = Short (SCI counts consecutive ones after start bit)
1 = Long (SCI counts ones only after stop bit)
PE —Parity Enable
0 = Parity disabled
1 = Parity enabled
PT —Parity Type
0 = Parity even (even number of ones causes parity bit to be zero, odd number of ones causes par-
ity bit to be one)
1 = Parity odd (odd number of ones causes parity bit to be zero, even number of ones causes parity
bit to be one)
SCCR2 —SCI Control 2
$0073
Bit 7
6
5
4
3
TIE
TCIE
RIE
ILIE
TE
RESET:
0
0
0
0
0
2
1
Bit 0
RE
RWU
SBK
0
0
0
TIE —Transmit Interrupt Enable
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
TCIE —Transmit Complete Interrupt Enable
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
RIE —Receiver Interrupt Enable
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
ILIE —Idle Line Interrupt Enable
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
TE —Transmitter Enable
0 = Transmitter disabled
1 = Transmitter enabled
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
53