MC68HC711K4CFN4 Datasheet, PDF (42/80 Pages) Motorola, Inc – 8-Bit Microcontroller

6 Parallel Input/Output
M68HC11 K-series MCUs have up to 62 input/output lines, depending on the operating mode. To en-
hance the I/O functions, the data bus of this microcontroller is nonmultiplexed. The following table is a
summary of the configuration and features of each port.
Port
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Port H
Input Pins
—
—
—
—
8
—
—
—
Output Pins
—
—
—
—
—
—
—
—
Bidirectional Pins
8
8
8
6
—
8
8
8
Shared Functions
Timer
High Order Address
Data Bus
SCI and SPI
A/D Converter
Low Order Address
Memory Expansion
PWM, Chip Select
NOTE
Port pin function is mode dependent. Do not confuse pin function with the electrical
state of the pin at reset. Port pins are either driven to a specified logic level or are
configured as high impedance inputs. I/O pins configured as high-impedance in-
puts have port data that is indeterminate. The contents of the corresponding latch-
es are dependent upon the electrical state of the pins during reset. In port
descriptions, an "I" indicates this condition. Port pins that are driven to a known log-
ic level during reset are shown with a value of either one or zero. Some control bits
are unaffected by reset. Reset states for these bits are indicated with a "U".
PORTA —Port A Data
$0000
Bit 7
6
5
4
3
2
1
Bit 0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
RESET:
I
I
I
I
I
I
I
I
Alt. Pin
Func.:
PAI
OC2
OC3
OC4 IC4/OC5 IC1
IC2
IC3
And/or:
OC1
OC1
OC1
OC1
OC1
—
—
—
NOTE
To enable PA3 as fourth input capture, set the I4/O5 bit in the PACTL register. Oth-
erwise, PA3 is configured as a fifth output compare out of reset, with bit I4/O5 being
cleared. If the DDA3 bit is set (configuring PA3 as an output), and IC4 is enabled,
writes to PA3 cause edges on the pin to result in input captures. Writing to TI4/O5
has no effect when the TI4/O5 register is acting as IC4. PA7 drives the pulse ac-
cumulator input but also can be configured for general-purpose I/O or output com-
pare. Note that even when PA7 is configured as an output, the pin still drives the
pulse accumulator input.
DDRA —Data Direction Register for Port A
RESET:
Bit 7
DDA7
0
6
DDA6
0
5
DDA5
0
4
DDA4
0
3
DDA3
0
2
DDA2
0
1
DDA1
0
$0001
Bit 0
DDA0
0
DDA[7:0] —Data Direction for Port A
0 = Corresponding pin configured for input
1 = Corresponding pin configured for output
MOTOROLA
42
M68HC11 K Series
MC68HC11KTS/D