MC68HC711K4CFN4 Datasheet, PDF (37/80 Pages) Motorola, Inc – 8-Bit Microcontroller

WINDOW 1
$0000 _EE/REG/RAM
$1000
$4000
$6000
CHIP SELECT 1
$00000
$02000
$04000
$06000
$08000
$0A000
$0C000
$0E000
BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7
XA[15:13]= XA[15:13]= XA[15:13]= XA[15:13]= XA[15:13]= XA[15:13]= XA[15:13]= XA[15:13]=
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
$01FFF $03FFF $05FFF $07FFF $09FFF $0BFFF $0DFFF $0FFFF
$8000
CHIP SELECT 2
$A000
$C000
INTERNAL
EPROM
$FFFF
$00000
$04000
$08000
WINDOW 2
$0C000 $10000
$3C000
BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 _{• • • • • • •} BANK 15
XA[17:14]= XA[17:14]= XA[17:14]= XA[17:14]= XA[17:14]=
0:0:0:0
0:0:0:1
0:0:1:0
0:0:1:1
0:1:0:0
XA[17:14]=
1:1:1:1
$03FFF $07FFF $0BFFF $0FFFF $13FFF
$3FFFF
PGAR = $1F
MMWBR = $84
MMSIZ = $E1
XA[17:13]
WINDOW 1 @ $4000,
WINDOW 2 @ $8000
WINDOW 1 = 8 KBYTES,
WINDOW 2 = 16 KBYTES
CSCTL = $00
GPCS1A = $00
GPSC1C = $06
GPCS2A = $00
GPCS2C = $08
NO I/O OR PROGRAM CHIP SELECTS
GEN. PURPOSE CHIP SELECT 1 FROM $00000
64 KBYTE RANGE (8 X 8K)
GEN. PURPOSE CHIP SELECT 2 FROM $00000
256 KBYTE RANGE (16 X 16K)
Figure 8 Memory Expansion Example 2
M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
37