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ÃÃÃÃÃÃ
ÃÃÃÃ
ÃÃÃÃ
ÃÃÃÃÃÃÃÃÃÃ
ÃÃÃÃÃÃÃÃÃÃ
ÃÃÃÃÃÃÃÃÃÃ
6.4.6
ÃÃÃÃÃÃÃÃÃÃ ÃÃÃ
ÃÃÃÃ
ÃÃÃ (DEC, DDEC)
DEC (D+)
D+
KnY, KnM, KnS, T, C, D, V, Z
DEC
FNC 25
ÃìåÃüøåÃèå
CPU
FX1S
FX1N
FX2N FX2NC
©
©
©
©
Ãìï. èÃñòðóêöèÿ (P) Ãáðà áîòêà Ãà ãè ïðîãðà ììû
16 Bit 32 Bit DEC/DECP
3
©
© © DDEC/DDECP 5
ÃÃÃÃÃÃÃÃ
ÃÃÃÃÃ
Ã
ÃÃÃÃÃÃÃ
Ãò ÷èñëîâîãî çÃà ÷åÃèÿ äà ÃÃûõ âû÷èòà åòñÿ ÷èñëî 1 (óìåÃüøà åòñÿ).
ÃÃñòðóêöèÿ âûïîëÃÿåòñÿ â êà æäîì öèêëå ïðîãðà ììû. Ãòîãî ìîæÃî èçáåæà òü áëà ãîäà ðÿ
ââåäåÃèþ âïåðåäè ôóÃêöèé èìïóëüñà (PLS- èëè PLF-èÃñòðóêöèè) èëè ïðèìåÃèâ êîìà ÃäÃûé
ïà ðà ìåòð à (äëÿ MELSEC FX/FX2N).
ÃÃÃ
ÃÃÃÃ
ÃÃÃ
Ãðè óìåÃüøåÃèè îò çÃà ÷åÃèÿ ÷èñëà , èìåþùåãîñÿ â D+, âû÷èòà åòñÿ ÷èñëî 1, êà ê òîëüêî
âûïîëÃèòñÿ âõîäÃîå óñëîâèå.
b 16-ÃÃ ÃÃÃÃÃÃÃ ÃÃÃ
ÃÃÃÃ (DEC-ÃÃÃÃÃÃÃÃÃÃ)
Ã
ñëè ïðè 16-òè áèòîâîì îïåðà Ãäå çÃà ÷åÃèå 1 îòÃèìåòñÿ îò ÷èñëà -32 768, òî çà ïèøåòñÿ
çÃà ÷åÃèå +32 768. ÃÃ¥ ïîÿâëÿåòñÿ Ãèêà êîãî ôëà ãà .
b 32-Ã ÃÃÃÃÃÃÃ ÃÃÃ
ÃÃÃÃ (DDEC-ÃÃÃÃÃÃÃÃÃÃ)
Ã
ñëè ïðè 32-õ áèòîâîì îïåðà Ãäå çÃà ÷åÃèå 1 îòÃèìåòñÿ îò ÷èñëà -2 147 483 648, òî
çà ïèøåòñÿ çÃà ÷åÃèå +2 147 483 647. ÃÃ¥ ïîÿâëÿåòñÿ Ãèêà êîãî ôëà ãà .
ÃðèìåÃÃ¥Ãèå DEC-èÃñòðóêöèè
Ãèñ. 6-47.
M0
[ D+ ]
DECP D10
Ãðèìåð ïðîãðà ììèðîâà Ãèÿ
DECP-èÃñòðóêöèè
C000066C
ÃÃà ÷åÃèå äà ÃÃûõ â ðåãèñòðå äà ÃÃûõ D10 ïðè êà æäîì âêëþ÷åÃèè âõîäÃîãî ñèãÃà ëà Ã0
óìåÃüøèòñÿ Ãà ÷èñëî 1.
ÃÃñòðóêöèÿ à êòèâèçèðóåòñÿ áëà ãîäà ðÿ ïîäêëþ÷åÃÃîé âïåðåäè ôóÃêöèè èìïóëüñà . Ãòî âà æÃî,
÷òîáû ïðîöåññ âû÷èòà Ãèÿ ÃÃ¥ âûïîëÃÿëñÿ â êà æäîì öèêëå ïðîãðà ììû.
Ħ
6 â 54
MITSUBISHI ELECTRIC
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