PIC24HJ12GP201_11 Datasheet, PDF (99/262 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers 5-cycle latency

PIC24HJ12GP201/202
REGISTER 9-1: PMD1: PERIPHERAL MODULE DISABLE CONTROL REGISTER 1
U-0
U-0
R/W-0
R/W-0
R/W-0
U-0
U-0
—
—
T3MD
T2MD
T1MD
—
—
bit 15
U-0
—
bit 8
R/W-0
U-0
I2C1MD
—
bit 7
R/W-0
U1MD
U-0
R/W-0
U-0
—
SPI1MD
—
U-0
R/W-0
—
AD1MD⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13
bit 12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
Unimplemented: Read as ‘0’
T3MD: Timer3 Module Disable bit
1 = Timer3 module is disabled
0 = Timer3 module is enabled
T2MD: Timer2 Module Disable bit
1 = Timer2 module is disabled
0 = Timer2 module is enabled
T1MD: Timer1 Module Disable bit
1 = Timer1 module is disabled
0 = Timer1 module is enabled
Unimplemented: Read as ‘0’
I2C1MD: I²C1 Module Disable bit
1 = I²C1 module is disabled
0 = I²C1 module is enabled
Unimplemented: Read as ‘0’
U1MD: UART1 Module Disable bit
1 = UART1 module is disabled
0 = UART1 module is enabled
Unimplemented: Read as ‘0’
SPI1MD: SPI1 Module Disable bit
1 = SPI1 module is disabled
0 = SPI1 module is enabled
Unimplemented: Read as ‘0’
AD1MD: ADC1 Module Disable bit⁽¹⁾
1 = ADC1 module is disabled
0 = ADC1 module is enabled
Note 1: PCFGx bits have no effect if the ADC module is disabled by setting this bit. When the bit is set, all port
pins that have been multiplexed with ANx will be in Digital mode.
© 2007-2011 Microchip Technology Inc.
DS70282E-page 99