PIC24HJ12GP201_11 Datasheet, PDF (133/262 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers 5-cycle latency

PIC24HJ12GP201/202
15.0 SERIAL PERIPHERAL
INTERFACE (SPI)
Note 1: This data sheet summarizes the features
of the PIC24HJ12GP201/202 family of
devices. However, it is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to “Section 18. Serial
Peripheral Interface (SPI)” (DS70206)
of the “dsPIC33F/PIC24H Family Refer-
ence Manual”, which is available from the
Microchip website (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices can be serial EEPROMs, shift
registers, display drivers, analog-to-digital (A/D)
converters, etc. The SPI module is compatible with
SPI and SIOP from Motorola^®.
Each SPI module consists of a 16-bit shift register,
SPIxSR (where x = 1 or 2), used for shifting data in and
out, and a buffer register, SPIxBUF. A control register,
SPIxCON, configures the module. Additionally, a status
register, SPIxSTAT, indicates status conditions.
The serial interface consists of 4 pins:
• SDIx (serial data input)
• SDOx (serial data output)
• SCKx (shift clock input or output)
• SSx (active low slave select).
In Master mode operation, SCK is a clock output. In
Slave mode, it is a clock input.
FIGURE 15-1:
SCKx
SPI MODULE BLOCK DIAGRAM
SSx
SDOx
SDIx
Sync
Control
Control
Clock
Select
Edge
Shift Control
bit 0
SPIxSR
Transfer
Transfer
1:1 to 1:8
Secondary
Prescaler
1:1/4/16/64
Primary FCY
Prescaler
SPIxCON1<1:0>
SPIxCON1<4:2>
Enable
Master Clock
SPIxRXB SPIxTXB
SPIxBUF
Read SPIxBUF
Write SPIxBUF
16
Internal Data Bus
© 2007-2011 Microchip Technology Inc.
DS70282E-page 133