PIC24HJ12GP201_11 Datasheet, PDF (257/262 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers 5-cycle latency

PIC24HJ12GP201/202
Uninitialized W Register.................................. 51, 57, 58
Reset Sequence ................................................................. 59
Resets ................................................................................. 51
S
Serial Peripheral Interface (SPI) ....................................... 133
Software Reset Instruction (SWR) ...................................... 57
Software Simulator (MPLAB SIM)..................................... 185
Software Stack Pointer, Frame Pointer
CALL Stack Frame...................................................... 39
Special Features of the CPU ............................................ 167
Special MCU Features ........................................................ 19
SPI Module
SPI1 Register Map...................................................... 33
Symbols Used in Opcode Descriptions............................. 176
System Control
Register Map............................................................... 38
T
Temperature and Voltage Specifications
AC ............................................................................. 198
Timer1 ............................................................................... 119
Timer2/3 ............................................................................ 121
Timing Characteristics
CLKO and I/O ........................................................... 201
Timing Diagrams
10-bit A/D Conversion............................................... 228
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
= 0, SSRC = 000) ............................................. 228
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 227
Brown-out Situations................................................... 56
External Clock........................................................... 199
I2Cx Bus Data (Master Mode) .................................. 220
I2Cx Bus Data (Slave Mode) .................................... 222
I2Cx Bus Start/Stop Bits (Master Mode) ................... 220
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 222
Input Capture (CAPx)................................................ 206
OC/PWM................................................................... 207
Output Compare (OCx)............................................. 206
Reset, Watchdog Timer, Oscillator Start-up Timer and
Power-up Timer ................................................ 202
Timer1, 2 and 3 External Clock................................. 204
Timing Requirements
CLKO and I/O ........................................................... 201
DCI AC-Link Mode .................................................... 224
DCI Multi-Channel, I²S Modes.................................. 224
External Clock........................................................... 199
Input Capture ............................................................ 206
Timing Specifications
10-bit A/D Conversion Requirements ....................... 229
12-bit A/D Conversion Requirements ....................... 227
I2Cx Bus Data Requirements (Master Mode) ........... 221
I2Cx Bus Data Requirements (Slave Mode) ............. 223
Output Compare Requirements ................................ 206
PLL Clock.................................................................. 200
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
er-up Timer and Brown-out Reset Requirements ...
203
Simple OC/PWM Mode Requirements ..................... 207
Timer1 External Clock Requirements ....................... 204
Timer2 External Clock Requirements ....................... 205
Timer3 External Clock Requirements ....................... 205
U
UART Module
UART1 Register Map.................................................. 33
© 2007-2011 Microchip Technology Inc.
Universal Asynchronous Receiver Transmitter (UART) ... 147
Using the RCON Status Bits............................................... 58
V
Voltage Regulator (On-Chip) ............................................ 170
W
Watchdog Time-out Reset (WDTR).................................... 57
Watchdog Timer (WDT)............................................ 167, 171
Programming Considerations ................................... 171
WWW Address ................................................................. 259
WWW, On-Line Support ....................................................... 8
DS70282E-page 257