PIC24HJ12GP201_11 Datasheet, PDF (87/262 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers 5-cycle latency

PIC24HJ12GP201/202
8.0 OSCILLATOR
CONFIGURATION
Note 1: This data sheet summarizes the features
of the PIC24HJ12GP201/202 family of
devices. However, it is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to “Section 7. Oscillator”
(DS70186) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
The PIC24HJ12GP201/202 oscillator system provides:
• External and internal oscillator options as clock
sources
• An on-chip PLL to scale the internal operating
frequency to the required system clock frequency
• An internal FRC oscillator that can also be used
with the PLL, thereby allowing full-speed
operation without any external clock generation
hardware
• Clock switching between various clock sources
• Programmable clock postscaler for system power
savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and takes fail-safe measures
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
selection.
A simplified diagram of the oscillator system is shown
in Figure 8-1.
FIGURE 8-1:
PIC24HJ12GP201/202 OSCILLATOR SYSTEM DIAGRAM
Primary Oscillator
OSC1
R⁽²⁾
S3
OSC2
S1
POSCMD<1:0>
PLL⁽¹⁾
XT, HS, EC
S2
XTPLL, HSPLL,
ECPLL, FRCPLL
S1/S3
DOZE<2:0>
FRC
Oscillator
FRCDIVN _S7
÷2
FCY
FP
FOSC
TUN<5:0>
FRCDIV<2:0>
÷ 16
SOSCO
SOSCI
LPRC
Oscillator
Secondary Oscillator
LPOSCEN
FRCDIV16 _S6
FRC _S0
LPRC
S5
SOSC
S4
Clock Fail Clock Switch Reset
S7
NOSC<2:0> FNOSC<2:0>
WDT, PWRT,
FSCM
Timer 1
Note 1:
2:
3:
See Figure 8-2 for PLL details.
If the Oscillator is used with XT or HS modes, an external parallel resistor with the value of 1 MΩ must be connected.
The term FP refers to the clock source for all peripherals, while FCY refers to the clock source for the CPU. Throughout this document,
FCY and FP are used interchangeably, except in the case of Doze mode. FP and FCY will be different when Doze mode is used with
a Doze ratio of 1:2 or lower.
© 2007-2011 Microchip Technology Inc.
DS70282E-page 87