MRF89XAM8A-I Datasheet, PDF (98/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

MRF89XA
4.4.4 PLL LOOP FILTER
To adequately reject spurious components arising from
the comparison frequency FCOMP, an external second
order loop filter is used. Figure 4-7 illustrates the loop
filter circuit.
FIGURE 4-7:
Loop Filter
It is recommended that a pair of high Q factor inductors
is selected. These should be mounted orthogonally to
other inductors (in particular the PA choke) to reduce
spurious coupling between the PA and VCO. These
measures may reduce radiated pulling effects and
undesirable transient behavior, thus minimizing spec-
tral occupancy. Ensuring a symmetrical layout of the
VCO inductors will improve PLL spectral purity.
RL1
CL2
CL1
PLLP
PLLN
The recommendations made in Section 3.2.4.1, PLL
Requirements and the loop filter proposed in the appli-
cation schematic’s BOM in Section 4.7, Bill of Materials
can be used. The loop filter settings are frequency
band independent and are hence relevant to all imple-
mentations of the MRF89XA.
4.4.5
VOLTAGE CONTROLLED
OSCILLATOR (VCO)
The integrated VCO requires only two external tank cir-
cuit inductors. As the input is differential, the two induc-
tors should have the same nominal value. The
performance of these components is important for both
the phase noise and the power consumption of the
PLL.
4.5 VDD Line Filtering
During the Reset event (caused by power-on, a glitch
on the supply line or a software Reset), the VDD line
should be kept clean. Noise or a periodic disturbing sig-
nal superimposed on the supply voltage may prevent
the device from getting out of the Reset state. To avoid
this, adequate filters should be made available on the
power supply lines to keep the distorting signal level
below 100-150 mV peak-to-peak, in the DC to 50 kHz
range for 200 ms, from VDD ramp start. The usage of
regulators or switching power supplies may sometimes
introduce switching noise on the VDD line, hence follow
the power supply manufacturer’s recommendations on
how to decrease the ripple of regulator IC and/or how
to shift the switching frequency.
4.6 Crystal Specification and
Selection Guidelines
Table 4-2 lists the crystal resonator specification for the
crystal reference oscillator circuit of the MRF89XA.
This specification covers the full range of operation of
the MRF89XA and is used in the application schematic
(for more information, see Section 4.7, Bill of Materi-
als).
TABLE 4-2: CRYSTAL RESONATOR SPECIFICATION
Name
Description
Minimum Typical Maximum Units
f_xtal
CLOAD
RM
Nominal frequency
Load capacitance for f_xtal
Motional resistance
9
12.800
15
MHz
10
15
16.5
pF
—
—
100
Ohms
CO
Shunt capacitance
1
—
7
pF
Δf_xtal
Δf_xtal(ΔT)
Δf_xtal(Δt)
Note:
Calibration tolerance at 25+/-3°C
-15
—
+15
ppm
Stability over temperature range [-40°C; +85°C]
-20
—
+20
ppm
Aging (first year)
5
—
5
ppm
The initial frequency tolerance, temperature stability and ageing performance should be chosen in
accordance with the target operating temperature range and the receiver bandwidth selected.
DS70622C-page 98
Preliminary
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