MRF89XAM8A-I Datasheet, PDF (48/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

MRF89XA
2.17.3 SYNC VALUE THIRD BYTE SET
REGISTER DETAILS
REGISTER 2-25: SYNCV15REG: SYNC VALUE THIRD BYTE CONFIGURATION REGISTER
(ADDRESS:0x138) (POR:0x00)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SYNCV<15:8>
bit 7
R/W-0
bit 0
R = Readable bit
-n = Value at POR
r = Reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
SYNCV<15:8>: SYNC Third Byte Value bits
These bits are to be set to configure the third byte of the SYNC word.
SYNCV<15:8> = 00000000 (default)
2.17.4 SYNC VALUE FOURTH BYTE SET
REGISTER DETAILS
REGISTER 2-26: SYNCV07REG: SYNC VALUE FOURTH BYTE CONFIGURATION REGISTER
(ADDRESS:0x19) (POR:0x00)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SYNCV<7:0>
bit 7
R/W-0
bit 0
R = Readable bit
-n = Value at POR
r = Reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
SYNCV<7:0>: SYNC Fourth Byte Value bits
These bits are to be set to configure the fourth byte of the SYNC word.
SYNCV<7:0> = 00000000 (default)
DS70622C-page 48
Preliminary
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