MRF89XAM8A-I Datasheet, PDF (64/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

MRF89XA
3.4.6
CHANNEL FILTERS SETTING IN
OOK MODE
The center frequency, f_o, is always set to 100 kHz. The
chart in Figure 3-8 illustrates the receiver bandwidth
when the BUTFILV<3:0> bits (FILCREG<3:0>) are
changed when the polyphase filter is activated.
Table 4-2 suggests a few filter settings in OOK mode
along with the corresponding passive filter bandwidth
and the accepted tolerance on the crystal reference.
3.4.7
RECEIVED SIGNAL STRENGTH
(RSSI)
After filtering, the In-phase and Quadrature signals are
amplified by a chain of 11 amplifiers, each with 6dB
gain. The outputs of these amplifiers are used to
evaluate the RSSI.
3.4.7.1 Resolution and Accuracy
When the RSSI resolution is 0.5 dB, the absolute
accuracy is not expected to be better than ±3dB due to
process and external component variation. Higher
accuracy while performing absolute RSSI
measurements will require additional calibration.
FIGURE 3-8:
450
ACTUAL BW OF POLYPHASE FILTER
Polyphase Filter's BW, OOK
Actual
BW
Theoretical
BW
400
350
300
250
200
150
100
50
0
0
2
4
6
8
10
12
14
16
Val (BUTFILV<3:0>) [d]
POLCFV<3:0> = 0011
3.4.7.2 Acquisition Time
In OOK mode, the RSSI evaluates the signal strength
by sampling I(t) and Q(t) signals 16 times in each
period of the chosen IF2 frequency (refer to
Section 2.10.1, Receiver Architecture). In FSK mode,
the signals are sampled 16 times in each f_dev period,
f_dev being the frequency deviation of the companion
transmitter. An average is then performed over a sliding
window of 16 samples. Therefore, the RSSI output
register RSTSREG (RSSIVAL<7:0>) is updated 16
times in each f_dev or IF2 period.
The following settings are recommended:
• FSK Mode: Ensure that the f_dev parameter (as
described in the FDEVREG register (Register 2-3)
through the FDVAL<7:0> bits)) remains consistent
with the actual frequency deviation of the
companion transmitter.
• OOK reception: Ensure that the f_dev parameter (as
described in the FDEVREG register (Register 2-3)
through the FDVAL<7:0> bits)) is equal to the
frequency of the I(t) and Q(t) signals (that is, the
second Intermediate Frequency, IF2, of the
receiver). Note that, this IF2 equals f_o, the center
frequency of the polyphase filter.
DS70622C-page 64
Preliminary
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