MRF89XAM8A-I Datasheet, PDF (35/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

MRF89XA
2.14.9 S1 COUNTER SET REGISTER
DETAILS
REGISTER 2-9: S1CREG: S1 COUNTER SET REGISTER (ADDRESS:0x08) (POR:0x32)
R/W-0
R/W-0
R/W-1
R/W-1
R/W-0
R/W-0
R/W-1
R/W-0
S1CVAL<7:0>
bit 7
bit 0
R = Readable bit
-n = Value at POR
r = Reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
S1CVAL<7:0>: S1 Value bits
These bits indicate the value in S1 counter to generate carrier frequencies in FSK mode.
S1CVAL<7:0> = 0x32 (default)
S1CVAL is activated if RPS = 0 in GCONREG. Also default values R1, P1 and S1 generate 915 MHz
in FSK Mode.
2.14.10 R2 COUNTER SET REGISTER
DETAILS
REGISTER 2-10: R2CREG: R2 COUNTER SET REGISTER (ADDRESS:0x09) (POR:0x74)
R/W-0
R/W-1
R/W-1
R/W-1
R/W-0
R/W-1
R/W-0
R/W-0
R2CVAL<7:0>
bit 7
bit 0
R = Readable bit
-n = Value at POR
r = Reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
R2CVAL<7:0>: R2 Value bits
These bits indicate the value in R2 counter to generate carrier frequencies in FSK mode.
R2CVAL<7:0> = 0x74 (default)
R2CVAL is activated if RPS = 1 in GCONREG. Also default values R2, P2 and S2 generate 920 MHz
in FSK Mode.
© 2010–2011 Microchip Technology Inc.
Preliminary
DS70622C-page 35