MRF89XAM8A-I Datasheet, PDF (43/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

MRF89XA
2.16.2
POLYPHASE FILTER
CONFIGURATION REGISTER
DETAILS
REGISTER 2-18: PFCREG: POLYPHASE FILTER CONFIGURATION REGISTER
(ADDRESS:0x11) (POR:0x38)
R/W-0
R/W-0
R/W-1
R/W-1
r
r
r
POLCFV<3:0>
—
—
—
bit 7
r
—
bit 0
R = Readable bit
-n = Value at POR
r = Reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
bit 3-0
POLCFV<3:0>: Polyphase Centre Frequency Value bits
These bits indicate the center frequency of the polyphase filter (typically recommended to 100 kHz).
POLCFV<3:0> = 0011 Î f_o = 100 kHz (default)
f_o
=
200
kHz^∗
⎛
⎝
1-^f--x2--^{t-.-a-8-l--MM-----H-}H^{----zz-⎠⎞}
∗
⎛
⎝
1-----+-----v_---a_---l_--(_---P_--8--O_----L_----C_----F_-----V_----)⎠⎞
Where,
POLCFV <3:0> is the value in the register
f_c is the cut-off frequency
f_o is the local oscillator frequency (center frequency)
f_xtal is the crystal oscillator frequency
Reserved<3:0>: Reserved bits; do not use
1000 = Reserved (default)
© 2010–2011 Microchip Technology Inc.
Preliminary
DS70622C-page 43