MRF89XAM8A-I Datasheet, PDF (58/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

MRF89XA
TABLE 3-1: FREQUENCY BAND SETTING
Target Channel
(MHz)
FBS1
FBS0
863-870
1
0
902-915
0
0
915-928
0
1
950-960
1
0
3.2.6.1
Trimming the VCO Tank by
Hardware and Software
To ensure that the frequency band of operation may be
accurately addressed by the R, P, and S dividers of the
synthesizer, it is necessary to ensure that the VCO is
correctly centered. The MRF89XA built-in VCO
trimming feature makes it easy and is controlled by the
SPI interface. This tuning does not require any RF test
equipment, and can be achieved by measuring Vtune,
the voltage between the PLLN and PLLP pins (6 and 7
pins).
The VCO is centered if the voltage is within the range
of 50 ≤ Vtune(mV) ≤ 150.
This measurement should be conducted when in
Transmit mode at the center frequency (fo) of the
desired band (for example, approximately 867 MHz in
the 863-870 MHz band), with the appropriate frequency
band setting using the (FBS<1:0> bits
(GCONREG<4:3>).
If this inequality is not satisfied, adjust the VCOT<1:0>
bits (GCONREG<2:0>) from ‘00’ by monitoring Vtune.
This allows the VCO voltage to be trimmed in +60 mV
increments. If the desired voltage range is
inaccessible, the voltage may be adjusted further by
changing the tank circuit inductance value.
An increase in inductance results in an increase Vtune.
In addition, for mass production, the VCO capacitance
is piece-to-piece dependant. As such, the optimization
proposed above should be verified on several
prototypes, to ensure that the population is centered
with 100 mV.
The register associated with VCO is:
• GCONREG (Register 2-1).
3.2.7 FREQUENCY CALCULATION
As illustrated in Figure 2-5, the PLL structure com-
prises three different dividers, R, P, and S, which set
the output frequency through the LO. A second set of
dividers is also available to allow rapid switching
between a pair of frequencies: R1/P1/S1 and R2/P2/
S2. These six dividers are programmed by six indepen-
dent registers (see Register 2-7 through Register 2-
12), which are selected by GCONREG.
FSK Mode
The formula provided in Equation 3-1 gives the
relationship between the local oscillator, and R, P and
S values, when using FSK modulation.
EQUATION 3-1:
f_{rf, fsk}
=
9--
8
f_l
o
f_{rf, fsk}
=
9--
8
×
-^f--^x---^t-^a---^L--
R+1
[
75^∗
(
P
+
1)
+
S
]
3.2.8 FSK MODE REGISTERS
The registers associated with FSK mode are:
• GCONREG (Register 2-1)
• DMODREG (Register 2-2).
OOK Mode
Due to the manner in which the baseband OOK
symbols are generated, the signal is always offset by
the FSK frequency deviation (FDVAL<7:0> as
programmed in FDEVREG<7:0>). Therefore, the
center of the transmitted OOK signal is represented by
Equation 3-2.
EQUATION 3-2:
f_{rf, ook, tx}
=
9--
8
×
f_lo–f_dev
f_{rf, ook, tx}
=
9--
8
×
-^f--^x---^t-^a---^L-- [ 75∗ ( P
R+1
+
1)
+
S]
–
f_dev
Consequently, in Receive mode, due to the low
intermediate frequency (Low-IF) architecture of the
MRF89XA, the frequency should be configured so as to
ensure the correct low-IF receiver baseband center
frequency, IF2, as shown in Equation 3-3.
EQUATION 3-3:
f_{rf, ook, rx}
=
9--
8
×
f_lo–IF2
f_{rf, ook, rx}
=
9-- _{× -}^f_--x_---t_-a_---L_{--[75∗(P + 1) + S] – IF2}
8 R+1
As described in Section 3.4.4, Channel Filters, it is
recommended that IF2 be set to 100 kHz.
3.2.9 OOK MODE REGISTERS
The registers associated with OOK mode are:
• GCONREG (Register 2-1)
• DMODREG (Register 2-2)
• FLTHREG (Register 2-5)
• OOKCREG (Register 2-22)
DS70622C-page 58
Preliminary
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