MRF89XAM8A-I Datasheet, PDF(28/140 Page) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MRF89XAM8A-I Datasheet, PDF (28/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

◁

MRF89XA

TABLE 2-6: CONFIGURATION/CONTROL/STATUS REGISTER DESCRIPTION

General Configuration Registers: Size â 13 Bytes, Start Address â 0x00

Address

Name

Related Control Functions

0x00 GCONREG General Configuration Register

0x01 DMODREG

0x02

0x03

0x04

0x05

0x06

0x07

0x08

0x09

0x0A

0x0B

0x0C

FDEVREG

BRSREG

FLTHREG

FIFOCREG

R1CREG

P1CREG

S1CREG

R2CREG

P2CREG

S2CREG

PACREG

Data and Modulation Configuration

Frequency Deviation Control Register

Bit Rate Set Register

Floor Threshold Control Register

FIFO Configuration Register

R1 Counter Set Register

P1 Counter Set Register

S1 Counter Set Register

R2 Counter Set Register

P2 Counter Set Register

S2 Counter Set Register

Power Amplifier Control Register

Transceiver mode, frequency band

selection, VCO trimming, PLL frequency

dividers selection

Modulation type, Data mode, OOK

threshold type, IF gain

Frequency deviation in FSK Transmit mode

Operational bit rate

Floor threshold in OOK Receive mode

FIFO size and threshold

Value input for R1 counter

Value input for P1 counter

Value input for S1 counter

Value input for R2 counter

Value input for P2 counter

Value input for S2 counter

Ramp Control of PA regulator output

voltage in OOK

Interrupt Configuration Registers: Size â 3 Bytes, Start Address â 0x0D

Address

Name

Related Control Functions

0x0D FTXRXIREG FIFO, Transmit and Receive Interrupt

Request Configuration Register

0x0E FTPRIREG

0x0F RSTHIREG

FIFO Transmit PLL and RSSI Interrupt

Configuration Register

RSSI Threshold Interrupt Request

Configuration Register

Interrupt request (IRQ0 and IRQ1) in

Receive mode, interrupt request (IRQ1) in

Transmit mode, interrupt request for FIFO

full, empty and overrun

FIFO fill method, FIFO fill, interrupt request

(IRQ0) for transmit start, interrupt request

for RSSI, PLL lock enable and status

RSSI threshold for interrupt

Receiver Configuration Registers: Size â 6 Bytes, Start Address â 0x10

Address

Name

Related Control Functions

0x10 FILCREG

0x11 PFCREG

0x12 SYNCREG

0x13 RESVREG

Filter Configuration Register

Polyphase Filter Configuration Register

Sync Control Register

Reserved Register

Passive filter bandwidth selection, sets the

receiver bandwidth

(Butterworth filter)

Selects the central frequency of the

polyphase filter

Enables polyphase filter (in OOK receive

mode, bit synchronizer control, Sync word

recognition, Sync word size, Sync word

error

Reserved for future use

DS70622C-page 28

Preliminary

▷