MRF89XAM8A-I Datasheet, PDF (8/140 Pages) Microchip Technology – Ultra Low-Power, Integrated ISM Band Sub-GHz Transceiver

FIGURE 1-1:
MRF89XA SIMPLIFIED BLOCK DIAGRAM
RFIO
Reception Block
First
LNA
Stage
Mixers
RSSI
IF Gain
Second
Stage
Mixers
I
Filtering/
Q ^{Amplification}
OOK
Demodulator
Digital
Demodulator
FSK
Demodulator
X
PA
LO1 RX
LO2 RX
LO1 TX
LO2 TX
I
Second
Stage
Mixers Q
I
First
Stage
Mixers _Q
Modulation
(DDS, DACs,
Interpolation Filters)
Sync Word
FIFO
Post-Demodulator
Transmission Block
For General Biasing
DVRS
Supply
Block
Phase Shift to Frequency Shift
Conversion (FSK mode)
AVRS
VCORS
PARS
Frequency
Synthesis Block
PLL Block
(Comparator, VCO,
Filter, Dividers)
LO1 TX
LO1 RX
LO2 TX
LO2 RX
X
X
X
Control
Interface
X
X
X
SPI
DATA
IRQ1
IRQ0
CLKOUT
PLOCK
xx
Supply
x
x
Crystal
x
x
Loop Filter