LAN8700 Datasheet, PDF(70/74 Page) SMSC Corporation – ±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR TM in a Small Footprint

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LAN8700 Datasheet, PDF (70/74 Pages) SMSC Corporation – ±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR TM in a Small Footprint

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LAN8700/LAN8700i

TABLE A-1: REVISION HISTORY (CONTINUED)

Revision Level & Date

Rev. 1.1

(04-17-07)

Rev. 1.0

(04-04-07)

Section/Figure/Entry

Correction

Table 5-30, "Register 0 - Basic Corrected Default value for bit 0.11 to the value of

Control"

0. This bit does not get set when the MODE[2:0]

bits are set to 110.

Section 5.4.9.2, "Mode Bus â Added detail about MODE[2:0] pins having no

MODE[2:0]"

affect at soft reset.

Table 5-30, "Register 0 - Basic Added note to reset description (bit 0.15).

Control"

Table 3-5, "General Signals"

AT nRST, added note that register bit values are

loaded from the Mode pins upon deassertion.

Table 7-11, "Internal Pull-Up / Added RX_DV to table.

Pull-Down Configurations"

Table 3-1, "MII Signals"

Added note that RX_DV and RX_ER cannot be

high during reset.

Table 6-7, "100M RMII

Transmit Timing Values"

Moved parameter T8.2 from MAX column to MIN

column.

Table 7-4, "Power

Consumption Device Only"

Changed column headings to add clarity regarding

source of current. Added Note.

Table 3-4, "Boot Strap

Configuration Inputs (Note 3-

1)"

Removed RX_CLK/REGOFF because it made

Note 3-1 false.

Table 5-40, "Register 26 -

Symbol Error Counter"

Added this table to describe the register.

Table 5-29, "SMI Register

Mapping"

Added Register 26.

Table 5-23, "Symbol Error

Counter Register 26: Vendor-

Specific"

Changed description from Reserved to Symbol

Error Counter.

Table 5-30, âRegister 0 - Basic Table modified: Default column for âPower Downâ

Control,â on page 35

and âIsolateâ.

Section 4.6.3, "MII vs. RMII

Configuration," on page 21

Fixed a typo, GPO0/MII is on the 187,

COL/RMII/CRS_DV is on the 8700.

Section 8.1, "Application

Diagram," on page 63

Added support components to crystal in application

diagram circuit. also added a note to the bottom to

indicate that purpose of R5 added.

Table 5-33, âRegister 3 - PHY Corrected reg3 values.

Identifier 2,â on page 36

Section 4.9.1, "Disable the

Internal +1.8V Regulator," on

page 24

Changed paragraph to correctly reflect operation

VDDIO and VDDA latch 1.8V regulator. 1.8v strap

above VIH or below VIL.

DS00002260A-page 70

ï£ 2007-2016 Microchip Technology Inc.

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