LAN8700 Datasheet, PDF (39/74 Pages) SMSC Corporation – ±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR TM in a Small Footprint

LAN8700/LAN8700i
TABLE 5-40:
Address
26.15:0
REGISTER 26 - SYMBOL ERROR COUNTER
Name
Description
Sym_Err_Cnt
100Base-TX receiver-based error register that
increments when an invalid code symbol is received
including IDLE symbols. The counter is incremented
only once per packet, even when the received packet
contains more than one symbol error. The 16-bit
register counts up to 65,536 (2¹⁶) and rolls over to 0 if
incremented beyond that value. This register is cleared
on reset, but is not cleared by reading the register. It
does not increment in 10Base-T mode.
Mode
RO
Default
0
TABLE 5-41:
Address
27.15
27.14
27.13
27.12
27:11
27.10:5
27.4
27.3:0
REGISTER 27 - SPECIAL CONTROL/STATUS INDICATIONS
Name
Description
AMDIXCTRL
Reserved
CH_SELECT
Reserved
SQEOFF
Reserved
HP Auto-MDIX control
0 - Auto-MDIX enable
1 - Auto-MDIX disabled (use 27.13 to control channel)
Reserved
Manual Channel Select
0 - MDI -TX transmits RX receives
1 - MDIX -TX receives RX transmits
Write as 0. Ignore on read.
Disable the SQE (Signal Quality Error) test (Heartbeat):
0 - SQE test is enabled.
1 - SQE test is disabled.
Write as 0. Ignore on read.
XPOL
Reserved
Polarity state of the 10Base-T:
0 - Normal polarity
1 - Reversed polarity
Reserved
Mode
RW
RW
RW
RW
RW,
NASR
RW
RO
RO
Default
0
0
0
0
0
000000
0
XXXXb
TABLE 5-42:
Address
28.15:0
REGISTER 28 - SPECIAL INTERNAL TESTABILITY CONTROLS
Name
Description
Reserved
Do not write to this register. Ignore on read.
Mode
RW
Default
N/A
TABLE 5-43:
Address
29.15:8
REGISTER 29 - INTERRUPT SOURCE FLAGS
Name
Description
Reserved
Ignore on read.
29.7
INT7
1 = ENERGYON generated
0 = not source of interrupt
29.6
INT6
1 = Auto-Negotiation complete
0 = not source of interrupt
29.5
INT5
1 = Remote Fault Detected
0 = not source of interrupt
29.4
INT4
1 = Link Down (link status negated)
0 = not source of interrupt
29.3
INT3
1 = Auto-Negotiation LP Acknowledge
0 = not source of interrupt
29.2
INT2
1 = Parallel Detection Fault
0 = not source of interrupt
Mode
RO/
LH
RO/
LH
RO/
LH
RO/
LH
RO/
LH
RO/
LH
RO/
LH
Default
0
X
X
X
X
X
X
 2007-2016 Microchip Technology Inc.
DS00002260A-page 39