LAN8700 Datasheet, PDF (69/74 Pages) SMSC Corporation – ±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR TM in a Small Footprint

LAN8700/LAN8700i
TABLE A-1: REVISION HISTORY (CONTINUED)
Revision Level & Date
Rev. 1.8
(02-14-08)
Rev. 1.6
(12-11-07)
Rev. 1.5
(10-04-07)
Rev. 1.4
(09-17-07)
Rev. 1.3
(06-27-07)
Rev. 1.2
(05-29-07)
Section/Figure/Entry
Correction
Table 6-5, "10M MII Transmit Removed the text “T5.2” in the “Parameter”
Timing Values"
column.
Figure 6-5, "10M MII Transmit Replaced figure.
Timing Diagrams"
Table 6-3, "100M MII Transmit Removed the text “T3.2” in the “Parameter”
Timing Values"
column.
Figure 6-3, "100M MII
Transmit Timing Diagram"
Replaced figure.
Table 6-11, "Reset Timing
Values"
Changed the MIN value for T11.3:
From: “400”
To: “10”
Table 6-4, "10M MII Receive
Timing Values"
Deleted last row in table.
Section 4.6.2.1, "Reference
Clock"
First sentence of second paragraph changed:
From: “between 35% and 65%”
To: “between 40% and 60%”
Table 6-7, "100M RMII
Transmit Timing Values"
Changed value of T8.1 and T8.2.
Table 6-6, "100M RMII
Receive Timing Values"
Changed value of T6.1.
Section 4.9, "Internal +1.8V
Regulator Disable"
Added information about not applying VDD_CORE
before VDD33 is at 2.64V.
Table 3-8, "Power Signals"
Updated description of VDD_CORE for information
on using external 1.8V supply.
Table 3-1, "MII Signals"
Updated description of RX_CLK/REGOFF to add
power supply sequencing information.
Table 5-33, "Register 3 - PHY Updated Revision Number to match the
Identifier 2"
LAN8700C silicon.
Section 8.0, "Application
Notes"
Table 8-1, "Simplified Application Diagram (see
Section 8.4, "Reference Designs")" has been
updated. In addition, the following cross reference
added to caption:
(see Section 8.4, "Reference Designs").
Section 7.1.4, "DC
Characteristics - Input and
Output Buffers"
Changed VIH to 0.68*VDDIO.
Changed VIL to 0.4*VDDIO.
Table 6-9, "10M RMII Transmit Moved parameter T10.2 in Table 6-9, "10M RMII
Timing Values"
Transmit Timing Values" from MAX column to MIN
column.
Table 6-5, "10M MII Transmit
Timing Values"
Moved parameter T5.2 in Table 6-5, "10M MII
Transmit Timing Values" from MAX column to MIN
column.
Table 5-48, "MODE[2:0] Bus" Added description when the MODE[2:0] bits are
set to 110.
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DS00002260A-page 69