MV78200 Datasheet, PDF (59/128 Pages) –

System Power Up and Reset Settings
Pins Sample Configuration
Table 28: Reset Configuration (Continued)
Pin
Power Rail
Configuration Function
DEV_AD[24:23] VDDO_B
Boot DeviceType Selection
0x0 = Boot from device bus
0x1 = Boot from SPI
0x2 = Boot from CE don’t care NAND Flash
0x3 = Boot from CE care NAND Flash
If DEV_AD[24:23] is set to 0x3, MPP[19:18] pins wake up as NAND Flash
outputs.
NOTE: Internally pulled down to 0x0.
DEV_AD[26:25] VDDO_B
NAND Flash Initialization Sequence
Selects if NAND Flash initialization sequence is performed. Required for NAND
Flash devices that do not support preload feature. Only relevant if DEV_AD[24]
is set to 1 (boot from NAND Flash).
0x0 = No initialization
0x1 = Init sequence enabled, 3 address cycles
0x2 = Init sequence enabled, 4 address cycles
0x3 = Init sequence enabled, 5 address cycles
NOTE: Internally pulled down to 0x0.
DEV_AD[27]
VDDO_B
Big Endian/Little Endian mode
0 = Little Endian
1 = Big Endian
NOTE: Internally pulled down to 0x0.
DEV_AD[28]
VDDO_B
CLK25 Select
0 = Both CLK25_PT and CLK25_SSC are used.
1 = Only CLK25_PT is used.
NOTE: Internally pulled up to 0x1.
DEV_AD[29]
VDDO_B
DRAM Interface Width
0 = 64/72-bits
1 = 32/40-bits
NOTE: Internally pulled to 0x0.
DEV_AD[30]
VDDO_B
NAND Flash Initialization Command
Selects whether to append command 0x30 to the address cycles of the NAND
Flash initialization sequence or not. Relevant only when using the NAND Flash
initialization sequence (DEV_AD[26:25] != 0x0).
0 = Do not append command 0x30.
1 = Append command 0x30.
NOTE: Internally pulled to 0x0.
DEV_AD[31]
VDDO_B
VDDO_C Voltage Select
0 = 1.8V
1 = 3.3V
NOTE: Internally pulled up to 0x1.
Copyright © 2008 Marvell
December 6, 2008, Preliminary
Document Classification: Proprietary Information
MV-S104671-U0 Rev. C
Page 59