MV78200 Datasheet, PDF (38/128 Pages) –

2.2.12
MV78200
Hardware Specifications
TDM Interface Pin Assignment
Note
According to the pin multiplexing setting (see Table 26, MPP Function Summary, on
page 49), the power rails for the TDM pins can be VDDO_B or VDDO_C.
Table 15: TDM Interface Pin Assignments
Pin Name
I/O Pin
Ty p e
Power Description
Rails
TDM_INTn
I
CMOS
VDDO_B Interrupt input from the SLIC device
or
NOTE: Multiplexed on MPP.
VDDO_C
TDM_RSTn
O
CMOS
VDDO_B
or
VDDO_C
SLIC reset input
Driven by the MV78200.
NOTE: Multiplexed on MPP.
TDM_PCLK
I/O CMOS
VDDO_B
or
VDDO_C
PCM audio bit clock
Driven by the MV78200 if configured as PCLK master.
Input to MV78200 (driven by the SLIC device) if configured as
PCLK slave.
NOTE: Multiplexed on MPP.
TDM_FSYNC
I/O CMOS
VDDO_B
or
VDDO_C
Frame Sync signal
Driven by the MV78200 if configured as FSYNC master.
Input to MV78200 (driven by the SLIC device) if configured as
FSYNC slave.
NOTE: Multiplexed on MPP.
TDM_DRX
I
CMOS
VDDO_B PCM audio input data
or
NOTE: Multiplexed on MPP.
VDDO_C
TDM_DTX
O
CMOS
VDDO_B
or
VDDO_C
PCM audio output data
NOTE: Multiplexed on MPP.
TDM0_RXQ
TDM1_RXQ
O
CMOS
VDDO_B
or
VDDO_C
TDM channel0/1 Rx qualifier
Driven by MV78200 to the SLIC device. Useful when interfacing
with a SLIC device that does not support time slot multiplexing
(indicates the exact time slot in which the SLIC device should drive
PCM data on TDM_DRX).
NOTE: Multiplexed on MPP.
TDM0_TXQ
TDM1_TXQ
O
CMOS
VDDO_B
or
VDDO_C
TDM channel0/1 Tx qualifier
Driven by MV78200 to the SLIC device. Useful when interfacing
with a SLIC device that does not support time slot multiplexing
(indicates the exact time slot in which the SLIC device should
sample PCM data on TDM_DTX).
NOTE: Multiplexed on MPP.
MV-S104671-U0 Rev. C
Page 38
Document Classification: Proprietary Information
Copyright © 2008 Marvell
December 6, 2008, Preliminary