MV78200 Datasheet, PDF (126/128 Pages) –

MV78200
Hardware Specifications
Table 69: Revision History (Continued)
Document Type
Revision
Section 7, System Power Up and Reset Settings
• Added Section 7.1, Power Up/Down Sequence Requirements, on page 53.
• Updated Note on page 56.
• Added new NF reset strap.
• Added DEV_ALE modes strap.
• Added more clocking operating points.
Date
Section 9, Electrical Specifications (Preliminary)
• Updated Section 9.3, Thermal Power Dissipation (Preliminary), on page 68.
• Updated Section 9.4, Current Consumption (Preliminary), on page 69.
Section 9.6.1, Reference Clock and Reset AC Timing Specifications, on page 74
• Added parameters for an SPI output clock, integrated with the TDM interface.
Section 9.6.6, SDRAM DDR2 Interface AC Timing
• Replaced 64-bit 333 MHz Interface Timing and Clock Specification tables with 64-bit 400 MHz tables.
• Added:
• Table 43, SDRAM DDR2 400 MHz Interface Address and Control Timing Table, on page 86
• Table 45, SDRAM DDR2 333 MHz Interface AC Timing Table, on page 88
• Table 47, SDRAM DDR2 333 MHz Clock Specifications, on page 90
• Table 46, SDRAM DDR2 333 MHz Interface Address and Control Timing Table, on page 89
• Table 48, SDRAM DDR2 266 MHz Interface AC Timing Table, on page 91
• Updated Figure 21, SDRAM DDR2 Interface Write AC Timing Diagram, on page 93.
• Updated Figure 23, SDRAM DDR2 Interface Read AC Timing Diagram, on page 94.
Section 9.6.8, Two-Wire Serial Interface (TWSI) AC Timing
• Updated TWSI output waveform Figure 30, TWSI Output Delay AC Timing Diagram, on page 99.
Section 9.6.10, JTAG Interface AC Timing, on page 104.
• Updated section.
Section 9.6.11, Time Division Multiplexing (TDM) Interface AC Timing, on page 106.
• Added section.
Section 9.7, Differential Interface Electrical Characteristics
• Updated Table 57, PCI Express Interface Differential Reference Clock Characteristics, on page 108 to reflect both
input and output modes.
Section 9.7.3, SATA Interface Electrical Characteristics
• In Table 60, SATA I Interface Gen1i Mode Driver and Receiver Characteristicss, on page 112, return loss
parameters (TX and RX) were added according to updated standard.
Section 10, Thermal Data (Preliminary), on page 120
• Updated section.
Section 11, Package Mechanical Dimensions, on page 121
• Updated Figure 45, “655 Pin FCBGA Package and Dimensions. The capacitors have been removed from the
figure.
Section 12, Part Order Numbering/Package Marking, on page 122
• Updated section.
Initial Release
A
October 9, 2007
MV-S104671-U0 Rev. C
Page 126
Document Classification: Proprietary Information
Copyright © 2008 Marvell
December 6, 2008, Preliminary