MV78200 Datasheet, PDF (50/128 Pages) –

MV78200
Hardware Specifications
Table 26: MPP Function Summary (Continued)
MPP
0x0
0x1
0x2
0x3
Pin
MPP[14] GPIO[14]
(in/out)
GE2_RXCTL SATA1_ACT
(in)
n (out)
MPP[15] GPIO[15]
(in/out)
GE2_RXCLK SATA0_ACT
(in)
n (out)
MPP[16] GPIO[16]
(in/out)
MPP[17] GPIO[17]
(in/out)
MPP[18] GPIO[18]
(in/out)
GE2_TXD[0]
(out)
GE2_TXD[1]
(out)
GE2_TXD[2]
(out)
SATA1_
PRESENTn
(out)
SATA0_
PRESENTn
(out)
MPP[19] GPIO[19]
(in/out)
GE2_TXD[3]
(out)
MPP[20] GPIO[20]
(in/out)
MPP[21] GPIO[21]
(in/out)
MPP[22] GPIO[22]
(in/out)
MPP[23] GPIO[23]
(in/out)
DEV_
AD[16]
GPIO[24]
(in/out)
DEV_
AD[17]
GPIO[25]
(in/out)
DEV_
AD[18]
GPIO[26]
(in/out)
GE2_RXD[0]
(in)
GE2_RXD[1]
(in)
GE2_RXD[2]
(in)
GE2_RXD[3]
(in)
GE3_TXCLK
OUT (out)
GE3_TXCTL
(out)
GE3_RXCTL
(in)
0x4
0x5
0x6
UA1_CTSn
(in)
NAND Flash
REn[1]
(out)
TDM_
SMOSI
(out)
UA1_RTSn
(out)
NAND Flash
WEn[1]
(out)
TDM_
SMISO
(in)
UA2_TXD
(out)
NAND Flash
REn[3]
(out)
TDM_
INTn
(in)
UA2_RXD
[in)
NAND Flash
WEn[3]
(out)
TDM_
RSTn
(out)
UA0_CTSn
(in)
BOOT
NAND Flash
REn
(out)
UA0_RTSn
(out)
BOOT
NAND Flash
WEn
(out)
UA1_CTSn
(in)
TDM_
PCLK
(in/out)
UA1_RTSn
(out)
TDM_
FSYNC
(in/out)
UA3_TXD
(out)
NAND Flash
REn[2]
(out)
TDM_
DRX
(in)
UA3_RXD
(in)
NAND Flash
WEn[2]
(out)
TDM_
DTX
(out)
UA2_TXD
(out)
TDM_
INTn
(in)
UA2_RXD
(in)
TDM_
RSTn
(out)
UA2_CTSn
(in)
TDM_
PCLK
(in/out)
MV-S104671-U0 Rev. C
Page 50
Document Classification: Proprietary Information
Copyright © 2008 Marvell
December 6, 2008, Preliminary