ISL78610 Datasheet, PDF (89/98 Pages) Intersil Corporation – Multi-Cell Li-Ion Battery Manager

ISL78610
PAGE REGISTER
ACCESS ADDR ADDRESS
DESCRIPTION
Read/
Write
3’b010
6’h16
6’h17
User Register
28 bits of register space arranged as 2 x 14 bits available for user data. These registers have no effect on the
operation of the ISL78610. These registers are included in the register checksum function.
Read Only 3’b010 6’h18 Comms Setup
13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED CRAT1 CRAT0 CSEL CSEL SIZE SIZE SIZE SIZE ADDR ADDR ADDR ADDR
2
1
3
2
1
0
3
2
1
0
0
0 COMS COMS COMS COMS 0
0
0
0
0
0
0
0
RATE1 RATE0 SEL2 SEL1
pin pin pin pin
ADDR0-3
Device stack address. The stack address (device position in the stack) is determined
automatically by the device in response to an “Identify” command. The resulting address is
stored in ADDR0-3 and is used internally for communications paring and sequencing. The
stack address may be read by the user but not written to.
SIZE0-3
Device stack size (top stack device address). Corresponds to the number of devices in the
stack. The stack size is determined automatically by the stack devices in response to an
“Identify” command. The resulting number is stored in SIZE0-3 and is used internally for
communications paring and sequencing. The stack size may be read by the user but not
written to.
CSEL1, 2
Communications setup bits. These bits reflect the state of the COMMS SELECT 1,2 pins and
determine the operating mode of the communications ports. See Table 3 on page 26.
CRAT0, 1
Communications rate bits. These bits reflect the state of the COMMS RATE 0,1 pins and
determine the bit rate of the daisy chain communications system. Table 4 on page 27.
Read/ 3’b010 6’h19 Device Setup
Write
13 12 11 10
9
8
7
6
5
4
3
2
1
0
WP5 WP4 WP3 WP2 WP1 WP0 BDDS RESER ISCN SCAN EOB RESER PIN37 PIN39
VED
VED
0
0
0
0
0
0
0
0
0
0
0
0 Pin Pin
PIN37, PIN39
These bits indicate the signal level on pin 37 and pin 39 of the device.
EOB
End Of Balance. This bit is set by the device when balancing is complete. This function is
used in the Timed Balance mode and Auto Balance mode. The BEN bit is cleared as a result
of this bit being set. Initialized to 1.
SCAN
Scan Continuous mode. This bit is set in response to a Scan Continuous command and
cleared by a Scan Inhibit command.
ISCN
Set wire scan current source/sink values. Set to 0 for 150µA. Set to 1 for 1mA.
BDDS
Balance condition during measurement. Controls the balance condition in Scan Continuous
mode and Auto Balance mode. Set to 1 to have balancing functions turned off 10ms prior
to and during cell voltage measurement. Set to 0 for normal operation (balancing functions
not affected by measurement).
WP5:0
Watchdog disable password. These bits must be set to 6’h3A (111010) before the
watchdog can be disabled. Disable watchdog by writing 7’h00 to the watchdog bits.
Read Only 3’b010 6’h1A Internal Temperature Limit
Value set in
Bit 0 is the LSB, Bit 13 is the MSB.
EEPROM
13 12 11 10
9
8
7
6
5
4
3
2
1
0
ITL ITL ITL ITL ITL ITL ITL ITL ITL ITL ITL ITL ITL ITL
13 12 11 10
8
8
7
6
5
4
3
2
1
0
NV NV NV NV NV NV NV NV NV NV NV NV NV NV
ITL1 to ITL12
IC over-temperature limit value. Over-temperature limit is compared to the measured
values for internal IC temperature to test for an over-temperature condition. The internal
temperature limit value is stored in nonvolatile memory during test and loaded to these
register bits at power up. The register contents may be read by the user but not written to.
Read Only 3’b010
6’h1B
6’h1C
Serial Number
The 28b serial number programmed in nonvolatile memory during factory test is mirrored to these 2 x 14 bit
registers. The serial number may be read at any time but may not be written.
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FN8830.1
June 16, 2016