ISL78610 Datasheet, PDF (85/98 Pages) Intersil Corporation – Multi-Cell Li-Ion Battery Manager

ISL78610
ACCESS
Read/
Write
PAGE REGISTER
ADDR ADDRESS
DESCRIPTION
3’h010
6’h03
Fault Setup:
These bits control various Fault configurations.
Default values are shown below, as are descriptions of each bit.
13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESER TST4 TST3 TST2 TST1 TST0 TOT2 TOT1 TOT0 WSCN SCN3 SCN2 SCN1 SCN0
VED
0
0
0
0
1
0
0
1
1
1
0
0
0
0
SCN0, 1, 2, 3
Scan interval code. Decoded to provide the scan interval setup for the auto scan function.
Initialized to 0000 (16ms scan interval). See Table 11 on page 42.
WSCN
Scan wires timing control. Set to 1 for tracking of the temperature scan interval. Set to 0 for
tracking of the cell voltage scan interval above 512ms. Interval is fixed at 512ms for faster
cell scan rates. See Table 11 on page 42.
TOT0, 1, 2
Fault Totalizer code bits. Decoded to provide the required fault totalization. An unbroken
sequence of positive fault results equal to the totalize amount is needed to verify a fault
condition. Initialized to 011 (8 sample totalizing.) See Table 42 on page 72.
This register must be re-written following an error detection resulting from totalizer
overflow.
TST0
Controls temperature testing of internal IC temperature. Set bit to 1 to enable internal
temperature test. Set to 0 to disable (not recommended). Initialized to 1 (on).
TST1 to TST4
Controls temperature testing on the external temperature inputs 1 to 4, respectively. Set bit
to 1 to enable the corresponding temperature test. Set to 0 to disable. Allows external
inputs to be used for general voltage monitoring without imposing a limit value.
TST1 to TST4 are initialized to 0 (off).
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FN8830.1
June 16, 2016