ISL78610 Datasheet, PDF (87/98 Pages) Intersil Corporation – Multi-Cell Li-Ion Battery Manager

ISL78610
PAGE REGISTER
ACCESS ADDR ADDRESS
DESCRIPTION
Read/
Write
3’h010
6’h06
Over-Temperature Fault:
Over-temperature fault on cells 12 to 1 correspond with bits OF12 to OF1, respectively.
Default values are all zero.
Bits are set to 1 when fault are detected.
The contents of this register may be reset via register write (14’h0000).
13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
TFLT4 TFLT3 TFLT2 TFLT1 TFLT0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TFLT0
Internal over-temperature fault. Bit set to 1 when a fault is detected. May be reset via
register write (14’h0000).
TFLT1 - TFLT4
External over-temperature inputs 1 to 4 (respectively.) Bit set to 1 when a fault is detected.
May be reset via register write (14’h0000).
Read Only 3’h010 6’h0F Read all Fault and Cell Setup data from locations: 6’h00 - 6’h06. See Figure 70D on page 60.
Set-Up Registers
BASE ADDR
(PAGE)
Access
ADDRESS
RANGE
DESCRIPTION
3’b010
6’h10 - 6’h1D Device Set-up registers. All device setup data.
and 6’h1F
ACCESS
Read/
Write
Read/
Write
Read/
Write
PAGE REGISTER
ADDR ADDRESS
DESCRIPTION
3’b010
6’h10
Overvoltage Limit:
Overvoltage Limit Value
Overvoltage limit is compared to the measured values for cells 1 to 12 to test for an overvoltage condition at any of
the cells.
Bit 0 is the LSB, Bit 12 is the MSB. Bit 13 is not used and must be set to 0.
13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESER OV12 OV11 OV10 OV9 OV8 OV7 OV6 OV5 OV4 OV3 OV2 OV1 OV0
VED
0
1
1
1
1
1
1
1
1
1
1
1
1
1
3’b010
6’h11
Undervoltage Limit:
Undervoltage Limit Value
Undervoltage limit is compared to the measured values for cells 1 to 12 to test for an undervoltage condition at any
of the cells.
Bit 0 is the LSB, Bit 12 is the MSB. Bit 13 is not used and must be set to 0.
13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESER UV12 UV11 UV10 UV9 UV8 UV7 UV6 UV5 UV4 UV3 UV2 UV1 UV0
VED
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3’b010
6’h12
External Temperature Limit:
Over-temperature limit value
Over-temperature limit is compared to the measured values for external temperatures 1 to 4 to test for an
over-temperature condition at any input. The temperature limit assumes NTC temperature measurement devices
(i.e., an over-temperature condition is indicated by a temperature reading below the limit value).
Bit 0 is the LSB, Bit 13 is the MSB.
13 12 11 10
9
8
7
6
5
4
3
2
1
0
ETL13 ETL12 ETL11 ETL10 ETL9 ETL8 ETL7 ETL6 ETL5 ETL4 ETL3 ETL2 ETL1 ETL0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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FN8830.1
June 16, 2016