ISL78610 Datasheet, PDF (39/98 Pages) Intersil Corporation – Multi-Cell Li-Ion Battery Manager

ISL78610
Notes on Board Layout
Referring to Figure 51 on page 31 (battery connection circuits),
the basic input filter structure comprises resistors R₂ to R₁₃, R₇₁
and capacitors C₂ to C₁₃, C₃₉. These components provide
protection against transients and EMI for the cell inputs. They
carry the loop currents produced by EMI and should be placed as
close to the connector as possible. The ground terminals of the
capacitors must be connected directly to a solid ground plane. Do
not use vias to connect these capacitors to the input signal path
or to ground. Any vias should be placed in line to the signal inputs
so that the inductance of these forms a low pass filter with the
grounded capacitors.
Referring to Figure 52 on page 32, the daisy chain components
are shown to the top right of the drawing. These are split into two
sections. Components to the right of this section should be
placed close to the board connector with the ground terminals of
capacitors connected directly to a solid ground plane. This is the
same ground plane that serves the cell inputs. Components to
the left of this section should be placed as closely to the device
as possible.
The battery connector and daisy chain connectors should be
placed closely to each other on the same edge of the board to
minimize any loop current area.
Two grounds are identified on the circuit diagram. These are
nominally referred to as noisy and quiet grounds. The noisy ground,
denoted by an “earth” symbol carries the EMI loop currents and
digital ground currents while the quiet ground is used to define the
decoupling voltage for voltage reference and the analog power
supply rail. The quiet and noisy grounds should be joined at the VSS
pin. Keep the quiet ground area as small as possible.
The circuits shown to the bottom right of Figure 52 on page 32
provide signal conditioning and EMI protection for the external
temperature inputs. These inputs are designed to operate with
external NTC thermistors.
Each of the external inputs has an internal pull-up resistor, which
is connected by a switch to the VCC pin whenever the TEMPREG
output is active. This arrangement results in an open input being
pulled up to the V_CC voltage.
Component Selection
Certain failures associated with external components can lead to
unsafe conditions in electronic modules. A good example of this
is a component that is connected between high energy signal
sources failing short. Such a condition can easily lead to the
component overheating and damaging the board and other
components in its proximity.
One area to consider with the external circuits on the ISL78610 is
the capacitors connected to the cell monitoring inputs. These
capacitors are normally protected by the series protection
resistors but could present a safety hazard in the event of a dual
point fault where both the capacitor and associated series
resistor fail short. Also, a short in one of these capacitors would
dissipate the charge in the battery cell if left uncorrected for an
extended period of time. It is recommended that capacitors C₁ to
C₁₃ be selected to be “fail safe” or “open mode” types. An
alternative strategy would be to replace each of these capacitors
with two devices in series, each with double the value of the
single capacitor.
A dual point failure in the balancing resistor (R₂₉, R₃₂, R₃₅, etc.)
of Figure 51 on page 31 and associated balancing MOSFET (Q₁
to Q₁₂) could also give rise to a shorted cell condition. It is
recommended that the balancing resistor be replaced by two
resistors in series.
Board Level Calibration
For best accuracy, the ISL78610 may be recalibrated after soldering
to a board using a simple resistor trim. The adjustment method
involves obtaining the average cell reading error for the cell inputs at
a single temperature and cell voltage value and applying a
select-on-test resistor to zero the average cell reading error.
The adjustment system uses a resistor placed either between
VDDEXT and V_REF or V_REF and VSS as shown in Figure 58. The
value of resistor R₁ or R₂ is then selected based on the average
error measured on all cells at 3.3V per cell and room
temperature e.g., with 3.3V on each cell input scan the voltage
values using the ISL78610 and record the average reading error
(ISL78610 reading – cell voltage value). Table 9 shows the value
of R₁ and R₂ required for various measured errors.
To use Table 9, find the measured error value closest to the result
obtained with measurements using the ISL78610 and select the
corresponding resistor value. Alternatively, if finer adjustment
resolution is required, then this may be obtained by interpolation
using Table 9.
VDDEXT
R₁
VREF
C₁
R₂
VSS
ISL78610
FIGURE 58. CELL READING ACCURACY ADJUSTMENT SYSTEM
TABLE 9. COMPONENT VALUES FOR ACCURACY CALIBRATION
ADJUSTMENT OF FIGURE 58
MEASURED ERROR AT VC = 3.3V
R₁
R₂
V₇₈₆₁₀ - V_CELL (mV)
(kΩ)
(kΩ)
4
205
DNP
3
274
DNP
2
412
DNP
1
825
DNP
0
DNP
DNP
-1
DNP
2550
-2
DNP
1270
-3
DNP
866
-4
DNP
649
DNP = Do Not Populate
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June 16, 2016