ISL78610 Datasheet, PDF (49/98 Pages) Intersil Corporation – Multi-Cell Li-Ion Battery Manager

ISL78610
The balancing value (B) can also be defined as in the set of
equations following. Auto balance is guided by Equations 2
and 3:
SOC = I  t = ^V-_Z--  t
(EQ. 2)
B = SOC  _d-^Z---_t = ^V-_Z--  t  _d-^Z---_t = _d-^V---_t  t
(EQ. 3)
Where:
dt = Balance cycle on time
t = Total balance time
Looking at Equations 2 and 3, the impedance drops out of the
equation, leaving only voltage and time elements. So, “B”
becomes a collection of voltages that integrate during the
balance cycle on time, and accumulate over the total balance
time period, to equal the programmed delta capacity.
Twelve 28-bit registers are provided for the balance value for
each cell. The balance values are programmed for all cells as
needed using Balance Value registers 6’h20 to 6’h37. (See
Table 19 for the contents of the Cell 1 and Cell 2 Balance Values
registers.)
TABLE 19. BALANCE VALUES REGISTER CELL1 AND CELL2
ADDR 13 12 11 10 9 8 7 6 5 4 3 2 1 0
6’20
Cell 1 Balance Value Bits [13:0]
6’21
Cell 1 Balance Value Bits [27:14]
6’22
Cell 2 Balance Value Bits [13:0]
6’23
Cell 2 Balance Value Bits [27:14]
At the end of each balance cycle on time interval the ISL78610
measures the voltage on each of the cells that were balanced
during that interval. The measured values are then subtracted
from the balance values for those cells. This process continues
until the balance value for each cell is zero, at which time the
auto balancing process is complete.
Auto Balance mode cannot operate while the ISL78610 is in
Sleep mode. If the Sleep command is received while the device is
auto balancing (and the watchdog timer is off) then balancing
continues until it is finished and then the device enters Sleep
mode. If the watchdog timer is active during the Auto Balance
mode and the device receives the Sleep command, then
balancing stops immediately, the device enters Sleep mode
immediately. The WDTM bit is set when the watchdog timer
expires (see Table 17).
If the device was performing an Auto balance operation prior to a
Sleep Command, then receiving a Wake command resumes
balancing with the same SOC calculations that were in place
when the device entered the Sleep Mode.
BALANCING IN SCAN CONTINUOUS MODE
Cell balancing may be active while the ISL78610 is operating in
Scan Continuous mode. In Scan Continuous mode the ISL78610
scans cell voltages, temperatures and open-wire conditions at a
rate determined by the Scan Interval bits in the Fault Setup
register. (See Table 11 on page 42). The behavior of the
balancing functions while operating in Scan Continuous mode is
controlled by the BDDS bit in the Device Setup register. If BDDS is
set, then cell balancing is inhibited during cell voltage
measurements and for 10ms before the cell voltage scan to
allow the balance devices to turn off. Balancing is re-enabled
automatically at the end of the scan.
MONITORING CELL BALANCE
To facilitate the system monitoring of the cell balance operation,
the ISL78610 has a Cells Being Balanced register that shows the
present state of the balance drivers If the bit is “1” it indicates
that the CBn output is enabled. A “0” indicates that the CBn
output is disabled.
TABLE 20. CELLS BEING BALANCED REGISTER
11 10 9 8 7 6 5 4 3 2 1 0
Daisy Chain Commands
Daisy chain devices require some special commands that are not
needed by a stand-alone device. These commands are Identify,
ACK and NAK. Identify is needed to enumerate the devices in the
stack. ACK is used as a command to check the communications
hardware and to indicate proper communications status. A NAK
response indicates that there was some problem with the
addressed device recognizing the command.
Identify Command
Identify mode is a special case mode that must be executed
before any other communications to daisy chained devices,
except for the Sleep command and Wake-up command. The
Identify command initiates address assignments to the devices
in the daisy chain stack.
While in Identify mode devices determine their stack position.
Identify mode is entered on receipt of the “base” Identify
command (this is the Identify command with the device address
set to 6’h00). The top stack device responds ACK on receiving the
base Identify command and then enters the Identify mode. Other
stack devices wait to allow the ACK response to be relayed to the
host microcontroller, then they enter Identify mode. Once in
Identify mode, all stack devices except the master, load address
4’h0 to their stack address register. The master (identified by the
state of the Comms Select pins = 2’b01) loads 4’h1 to its stack
address.
On receiving the ACK response the host microcontroller then
sends the Identify command with stack address 6’h2 (i.e.,
24’h0000 0011 0010 0100 0010 0110). The stack address is
bolded. The last four bits are the corresponding CRC value. The
master passes the command onto the stack. The device at stack
position 2 responds by setting the stack address bits (ADDR[3:0])
and stack size bits (SIZE[3:0]) in the Comms Setup register to
4’h2 and returns the Identify response with CRC and an address
of 6’h32 (i.e., 32’b0000 0011 0010 0111 0010 0000 0000
1111). The address bits are bolded. The address bits contains the
normal stack address (2’h0010) and the state of the Comms
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FN8830.1
June 16, 2016