VS28F016SV Datasheet, PDF (42/50 Pages) Intel Corporation – 16-Mbit (1-Mbit x 16, 2-Mbit x 8) FlashFileTM MEMORY

VS28F016SV MS28F016SV FlashFile^TM Memory
5 9 AC Characteristics for CE Controlled Command Write Operations⁽¹⁾
V_CC ^e 5 0V g0 25V T_CSE2 ^{e b}40 C to ^a125 C T_CSE1 ^{e b}55 C to ^a125 C Load ^e 30 pF
V_CC ^e 5 0V g0 5V T_CSE2 ^{e b}40 C to ^a125 C T_CSE1 ^{e b}55 C to ^a125 C Load ^e 100 pF
(Continued)
Versions⁽⁴⁾
Sym
Parameter
t_PHEL
RP High
Recovery to
CE Going
Low
t_EHGL
Write
Recovery
before Read
t_QVVL(1 ²⁾
V_PP Hold
from Valid
Status
Register
(CSR GSR
BSR) Data at
RY BY
High
t_EHQV(1)
Duration of
Word Byte
Write
Operation
t_EHQV(2)
Duration of
Block Erase
Operation
Notes
37
3
3 4 5 11
34
VS MS28F016SV-85
V_CC g5%
Min
Max
1
60
0
45
03
10
VS MS28F016SV-85
V_CC g10%
Min
Max
1
VS MS28F016SV-100
V_CC g10%
Unit
Min
Max
1
ms
65
70
ns
0
0
ms
45
45
ms
03
10
03
10
sec
NOTES
1 Read timings during write and erase are the same as for normal read
2 Refer to command definition tables for valid address and data values
3 Sampled not 100% tested Guaranteed by design
4 Write erase durations are measured to valid Status Data V_PP e 12 0V g 0 6V
5 Word Byte Write operations are typically performed with 1 Programming Pulse
6 Address and Data are latched on the rising edge of CE for all command write operations
7 CE_x is defined as the latter of CE₀ or CE₁ going low or the first of CE₀ or CE₁ going high
8 Device speeds are defined as
80 85 100 ns at V_CC e 5 0V equivalent to
120 ns at V_CC e 3 3V
9 See the high speed AC Input Output Reference Waveforms and AC Testing Load Circuit
10 See the standard AC Input Output Reference Waveforms and AC Testing Load Circuit
11 The TBD information will be available in a technical paper Please contact Intel’s Application Hotline or your local sales
office for more information
42