VS28F016SV Datasheet, PDF (16/50 Pages) Intel Corporation – 16-Mbit (1-Mbit x 16, 2-Mbit x 8) FlashFileTM MEMORY

VS28F016SV MS28F016SV FlashFile^TM Memory
4 5 Compatible Status Register
WSMS
ESS
ES
DWS
VPPS
R
R
R
7
6
5
4
3
2
1
0
NOTES
CSR 7 ^e WRITE STATE MACHINE STATUS RY BY output or WSMS bit must be checked to
1 ^e Ready
0 ^e Busy
determine completion of an operation (Erase Erase
Suspend or Data Write) before the appropriate Status bit
(ESS ES or DWS) is checked for success
CSR 6 ^e ERASE-SUSPEND STATUS
1 ^e Erase Suspended
0 ^e Erase In Progress Completed
CSR 5 ^e ERASE STATUS
If DWS and ES are set to ‘‘1’’ during an erase attempt an
1 ^e Error In Block Erasure
0 ^e Successful Block Erase
improper command sequence was entered Clear the
CSR and attempt the operation again
CSR 4 ^e DATA-WRITE STATUS
1 ^e Error in Data Write
0 ^e Data Write Successful
CSR 3 ^e V_PP STATUS
1 ^e V_PP Error Detect Operation Abort
0 ^e V_PP OK
The VPPS bit unlike an A D converter does not provide
continuous indication of V_PP level The WSM interrogates
V_PP’s level only after the Data-Write or Erase command
sequences have been entered and informs the system if
V_PP has not been switched on VPPS is not guaranteed to
report accurate feedback between V_PPLK(max) and
V_PPH1(min) and between V_PPH1(max) and V_PPH2(min)
and above V_PPH2(max)
CSR 2-0 ^e RESERVED FOR FUTURE ENHANCEMENTS
These bits are reserved for future use mask them out when polling the CSR
16